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PIC24F04KA201 Datasheet(PDF) 129 Page - Microchip Technology |
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PIC24F04KA201 Datasheet(HTML) 129 Page - Microchip Technology |
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129 / 224 page ![]() © 2009 Microchip Technology Inc. Preliminary DS39937B-page 127 PIC24F04KA201 FAMILY 16.3 Setting Baud Rate When Operating as a Bus Master To compute the Baud Rate Generator (BRG) reload value, use Equation 16-1. EQUATION 16-1: COMPUTING BAUD RATE RELOAD VALUE(1) 16.4 Slave Address Masking The I2C1MSK register (Register 16-3) designates address bit positions as “don’t care” for both 7-Bit and 10-Bit Addressing modes. Setting a particular bit location (= 1) in the I2C1MSK register causes the slave module to respond whether the corresponding address bit value is ‘0’ or ‘1’. For example, when I2C1MSK is set to ‘00100000’, the slave module will detect both addresses: ‘0000000’ and ‘00100000’. To enable address masking, the Intelligent Peripheral Management Interface (IPMI) must be disabled by clearing the IPMIEN bit (I2C1CON<11>). TABLE 16-1: I2C™ CLOCK RATES(1) TABLE 16-2: I2C™ RESERVED ADDRESSES(1) I2C1BRG FCY FSCL ------------ FCY 10 000 000 ,, ------------------------------ – ⎝⎠ ⎛⎞ 1 – = FSCL FCY I2C1BRG 1 FCY 10 000 000 ,, ------------------------------ ++ ---------------------------------------------------------------------- = or Note 1: Based on FCY = FOSC/2, Doze mode and PLL are disabled. Note: As a result of changes in the I2C protocol, the addresses in Table 16-2 are reserved and will not be Acknowledged in Slave mode. This includes any address mask settings that include any of these addresses. Required System FSCL FCY I2C1BRG Value Actual FSCL (Decimal) (Hexadecimal) 100 kHz 16 MHz 157 9D 100 kHz 100 kHz 8 MHz 78 4E 100 kHz 100 kHz 4 MHz 39 27 99 kHz 400 kHz 16 MHz 37 25 404 kHz 400 kHz 8 MHz 18 12 404 kHz 400kHz 4MHz 9 9 385kHz 400kHz 2MHz 4 4 385kHz 1 MHz 16 MHz 13 D 1.026 MHz 1MHz 8MHz 6 6 1.026MHz 1MHz 4MHz 3 3 0.909MHz Note 1: Based on FCY = FOSC/2, Doze mode and PLL are disabled. Slave Address R/W Bit Description 0000 000 0 General Call Address(2) 0000 000 1 Start Byte 0000 001 x Cbus Address 0000 010 x Reserved 0000 011 x Reserved 0000 1xx x HS Mode Master Code 1111 1xx x Reserved 1111 0xx x 10-Bit Slave Upper Byte(3) Note 1: The address bits listed here will never cause an address match, independent of the address mask settings. 2: Address will be Acknowledged only if GCEN = 1. 3: Match on this address can only occur on the upper byte in 10-Bit Addressing mode. |
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