S3C70F2 datasheet(35/38 Pages) SAMSUNG

Part #	S3C70F2

Description	The S3C70F2/C70F4 single-chip CMOS microcontroller has been designed for high-performance using Samsungs newest 4-bit CPU core, SAM47 (Samsung Arrange

PDF	38 Pages

Scroll/Zoom	100%

Manufacturer	SAMSUNG [Samsung semiconductor]

Direct Link	http://www.samsung.com/Products/Semiconductor

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35 / 38 page

S3C70F2/C70F4/P70F4

S3P70F4 OTP

16–9

Table 16-9. A.C. Electrical Characteristics ( Concluded)

A = – 40

°C to + 85 °C, V

DD = 2.0 V to 5.5 V)

Parameter

Symbol

Conditions

Min

Typ

Max

Units

SCK High, Low

Width

KH, tKL

DD = 2.7 V to 5.5 V

External

SCK source

335

–

Internal

SCK source

KCY/2 - 50

DD = 2.0 V to 5.5 V

External

SCK source

1600

Internal

SCK source

KCY/2 - 150

SI Setup Time to

SCK High

SIK

DD = 2.7 V to 5.5 V

External

SCK source

100

–

Internal

SCK source

150

DD = 2.0 V to 5.5 V

External

SCK source

150

Internal

SCK source

500

SI Hold Time to

SCK High

KSI

DD = 2.7 V to 5.5 V

External

SCK source

400

–

Internal

SCK source

400

DD = 2.0 V to 5.5 V

External

SCK source

600

Internal

SCK source

500

Output Delay for

SCK to SO

KSO

(1)

DD = 2.7 V to 5.5 V

External

SCK source

–

300

Internal

SCK source

250

DD = 2.0 V to 5.5 V

External

SCK source

1000

Internal

SCK source

1000

Interrupt Input

High, Low Width

INTH,

INTL

INT0

(2)

–

µs

INT1, KS0–KS2

RESET Input

Low Width

RSL

Input

–

µs

NOTES:

R(1Kohm) and C (100pF) are the load resistance and load capacitance of the SO output line.

Minimum value for INT0 is based on a clock of 2tCY or 128 / fx as assigned by the IMOD0 register setting.

S3C70F2 Datasheet(PDF) 35 Page - Samsung semiconductor

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