LTM8062EVPBF datasheet(15/20 Pages) LINER

15 / 20 page

LTM8062

8062f

APPLICATIONS INFORMATION

PCB Layout

Most of the headaches associated with PCB layout have

been alleviated or even eliminated by the high level of

LTM8062 integration. The LTM8062 is nevertheless

a switching power supply, and care must be taken to

minimize EMI and ensure proper operation. Even with the

high level of integration, you may fail to achieve specified

operation with a haphazard or poor layout. See Figure 7

for a suggested layout. Ensure that the grounding and

heat sinking are acceptable.

1. Place the CIN capacitor as close as possible to the VIN

and GND connection of the LTM8062.

2. If used, place the CBAT capacitor as close as possible

to the BAT and GND connection of the LTM8062.

3. Place the CINandCBAT(ifused)capacitorssuchthattheir

ground current flows directly adjacent or underneath

the LTM8062.

4. Connect all of the GND connections to as large a copper

pour or plane area as possible on the top layer. Avoid

breaking the ground connection between the external

components and the LTM8062.

5. For good heat sinking, use vias to connect the GND cop-

per area to the board’s internal ground planes. Liberally

distribute these GND vias to provide both a good ground

connection and thermal path to the internal planes of the

printed circuit board. Pay attention to the location and

density of the thermal vias in Figure 5. The LTM8062

can benefit from the heat-sinking afforded by vias that

connect to internal GND planes at these locations, due to

their proximity to internal power handling components.

The optimum number of thermal vias depends upon

the printed circuit board design. For example, a board

might use very small via holes. It should employ more

thermal vias than a board that uses larger holes.

Hot-Plugging Safely

The small size, robustness and low impedance of ceramic

capacitors make them an attractive option for the input

bypass capacitor of LTM8062. However, these capacitors

can cause problems if the LTM8062 is plugged into a

live input supply (see Application Note 88 for a complete

discussion). The low loss ceramic capacitor combined

with stray inductance in series with the power source

forms an underdamped tank circuit, and the voltage at the

VIN pin of the LTM8062 can ring to more than twice the

nominal input voltage, possibly exceeding the LTM8062’s

rating and damage the part. If the input supply is poorly

controlled or the user will be plugging the LTM8062 into

an energized supply, the input network should be designed

to prevent this overshoot. This can be accomplished by

installing a small resistor in series with VIN, but the most

popular method of controlling input voltage overshoot is

ADJ

BAT

(OPTIONAL)

VIN

VINA

GND

THERMAL VIAS

RUN VINREG

CIN

CBAT

8062 F07

Figure 7. Suggested Layout and Via Placement

LTM8062EVPBF Datasheet(PDF) 15 Page - Linear Technology

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