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ST10F272Z2 Datasheet(PDF) 95 Page - STMicroelectronics |
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ST10F272Z2 Datasheet(HTML) 95 Page - STMicroelectronics |
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95 / 189 page  ST10F272Z2 System reset 95/189 Figure 26. SW / WDT unidirectional RESET (EA = 0) 20.6 Bidirectional reset As shown in the previous sections, the RSTOUT pin is driven active (low level) at the beginning of any reset sequence (synchronous/asynchronous hardware, software and watchdog timer resets). RSTOUT pin stays active low beyond the end of the initialization routine, until the protected EINIT instruction (End of Initialization) is completed. The Bidirectional Reset function is useful when external devices require a reset signal but cannot be connected to RSTOUT pin, because RSTOUT signal lasts during initialization. It is, for instance, the case of external memory running initialization routine before the execution of EINIT instruction. Bidirectional reset function is enabled by setting bit 3 (BDRSTEN) in SYSCON register. It only can be enabled during the initialization routine, before EINIT instruction is completed. When enabled, the open drain of the RSTIN pin is activated, pulling down the reset signal, for the duration of the internal reset sequence (synchronous/asynchronous hardware, synchronous software and synchronous watchdog timer resets). At the end of the internal reset sequence the pull down is released and: ● After a Short Synchronous Bidirectional Hardware Reset, if RSTF is sampled low 8 TCL periods after the internal reset sequence completion (refer to Figure 21 and Figure 22), the Short Reset becomes a Long Reset. On the contrary, if RSTF is sampled high the device simply exits reset state. ● After a Software or Watchdog Bidirectional Reset, the device exits from reset. If RSTF remains still low for at least 4 TCL periods (minimum time to recognize a Short Hardware reset) after the reset exiting (refer to Figure 27 and Figure 28), the Software or Watchdog Reset become a Short Hardware Reset. On the contrary, if RSTF remains low for less than 4 TCL, the device simply exits reset state. P0[7:2] not transparent P0[12:8] transparent not t. P0[1:0] not t. not transparent RST 1024 TCL RSTOUT RSTIN ALE 8 TCL P0[15:13] not transparent |
Similar Part No. - ST10F272Z2_08 |
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Similar Description - ST10F272Z2_08 |
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