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ST10F272Z2 Datasheet(PDF) 29 Page - STMicroelectronics |
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ST10F272Z2 Datasheet(HTML) 29 Page - STMicroelectronics |
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29 / 189 page  ST10F272Z2 Internal Flash memory 29/189 5.3 Write operation The Flash module have one single register interface mapped in the memory space of the IBUS (0x08 0000 to 0x08 0015). All the operations are enabled through four 16-bit control registers: Flash Control Register 1-0 High/Low (FCR1H/L-FCR0H/L). Eight other 16-bit registers are used to store Flash Address and Data for Program operations (FARH/L and FDR1H/L-FDR0H/L) and Write Operation Error flags (FERH/L). All registers are accessible with 8 and 16-bit instructions (since operates in 16-bit mode when in read/ write). Before accessing the IFlash module (and consequently also the Flash register to be used for program/erasing operations), bit ROMEN in SYSCON register shall be set. During a Flash write operation any attempt to read the flash itself, that is under modification, will output invalid data (software trap 009Bh). This means that the Flash is not fetchable when a programming operation is active: the write operation commands must be executed from another memory (internal RAM or external memory), as in ST10F269 device. In fact, due to IBUS characteristics, it is not possible to perform a write operation on IFLASH, when fetching code from IFLASH. Direct addressing is not allowed for write accesses to IFLASH Control Registers. During a Write operation, when bit LOCK of FCR0 is set, it is forbidden to write into the Flash Control Registers. Power supply drop If during a write operation the internal low voltage supply drops below a certain internal voltage threshold, any write operation running is suddenly interrupted and the module is reset to Read mode. At following Power-on, the interrupted Flash write operation must be repeated. |
Similar Part No. - ST10F272Z2_08 |
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Similar Description - ST10F272Z2_08 |
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