R28 datasheet(79/473 Pages) RENESAS

79 / 473 page

R8C/28 Group, R8C/29 Group

7. Programmable I/O Ports

Rev.2.10

Sep 26, 2008

Page 60 of 441

REJ09B0279-0210

Figure 7.10

Registers PUR0 and PUR1

Figure 7.11

P1DRR Register

Pull-Up Control Register 0

Symbol

Address

After Reset

PUR0

00FCh

00h

Bit Symbol

Bit Name

Function

NOTE:

PU02

Set to 0. When read, the content is 0.

Reserved bits

0 : Not pulled up

1 : Pulled up

0 : Not pulled up

1 : Pulled up

When this bit is set to 1 (pulled up), the pin w hose direction bit is set to 0 (input mode) is pulled up.

PU07

P3_4, P3_5, P3_7 pull-up(1)

PU06

P3_3 pull-up(1)

—

(b5-b4)

b3 b2 b1

—

(b1-b0)

b7 b6 b5 b4

Reserved bits

PU03

P1_4 to P1_7 pull-up(1)

P1_0 to P1_3 pull-up(1)

Set to 0. When read, the content is 0.

Pull-Up Control Register 1

Symbol

Address

After Reset

PUR1

00FDh

00h

Bit Symbol

Bit Name

Function

NOTE:

—

When this bit is set to 1 (pulled up), the pin w hose direction bit is set to 0 (input mode) is pulled up.

b3 b2

b7 b6 b5 b4

—

(b7-b6)

Nothing is assigned. If necessary, set to 0.

When read, the content is 0.

—

(b0)

Reserved bit

Set to 0. When read, the content is 0.

—

(b5-b2)

Reserved bits

PU11

P4_5 pull-up(1)

Set to 0. When read, the content is 0.

0 : Not pulled up

1 : Pulled up

Port P1 Drive Capacity Control Register (For N, D Version Only)

Symbol

Address

After Reset

P1DRR

00FEh

00h

Bit Symbol

Bit Name

Function

NOTE:

1. Both “H” and “L” output are set to high drive capacity.

P1DRR7

P1DRR5

Set P1 output transistor drive capacity

0 : Low

1 : High(1)

P1DRR2

P1_7 drive capacity

P1_3 drive capacity

P1DRR6

P1_6 drive capacity

b3 b2 b1 b0

P1DRR0

b7 b6 b5 b4

P1_1 drive capacity

P1_0 drive capacity

P1DRR3

P1_2 drive capacity

P1DRR1

P1DRR4

P1_4 drive capacity

P1_5 drive capacity

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