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IP1206PBF Datasheet(PDF) 20 Page - International Rectifier |
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IP1206PBF Datasheet(HTML) 20 Page - International Rectifier |
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20 / 30 page ![]() 2/26/2008 www.irf.com 20 iP1206PbF Feedback Compensation The iP1206 is a voltage mode controller; the control loop is a single voltage feedback path including error amplifier and error comparator. To achieve fast transient response and accurate output regulation, a compensation circuit is necessary. The goal of the compensation network is to provide a closed loop transfer function with the highest 0dB crossing frequency and adequate phase margin (greater than 45o). The output LC filter introduces a double pole, – 40dB/decade gain slope above its corner resonant frequency, and a total phase lag of 180o (see Fig. 20). The resonant frequency of the LC filter expressed as follows: Since we already have 180o phase shift just from the output filter, the system risks being unstable. The iP1206’s error amplifier is a differential-input transconductance amplifier. The output is available for DC gain control or AC phase compensation. The E/A can be compensated either in type II or type III compensation. When it is used in type II compensation the transconductance properties of the E/A become evident and can be used to cancel one of the output filter poles. This will be accomplished with a series RC circuit from Comp pin to ground as shown in Fig. 21. This method requires that the output capacitor should have enough ESR to satisfy stability requirements. In general the output capacitor’s ESR generates a zero typically at 5kHz to 50kHz which is essential for an acceptable phase margin. The ESR zero of the output capacitor expressed as follows: -(12) - - - o o LC C L F ∗ ∗ = π 2 1 Gain FLC 0dB Phase 0 FLC -180 Frequency Frequency -40dB/decade Fig. 20: Gain and Phase of LC filter The transfer function (Ve/Vo) is given by: The (s) indicates that the transfer function varies as a function of frequency. This configuration introduces a gain and zero, expressed by: The gain is determined by the voltage divider and E/A’s transconductance gain. First select the desired zero-crossover frequency (Fo): Use the following equation to calculate R 4: Where: V in = Maximum Input Voltage V osc = Oscillator Ramp Voltage F o = Crossover Frequency F ESR = Zero Frequency of the Output Capacitor F LC = Resonant Frequency of the Output Filter g m = Error Amplifier Transconductance -(13) - - - o ESR C ESR F * * 2 1 π ∗ = Ve VOUT VREF R5 R6 R4 C9 E/A FZ H(s) dB Frequency Gain(dB) Fb Comp CPOLE Fig. 21: TypeII compensation network and its asymptotic gain plot -(14) - - - 9 9 4 6 5 5 1 * * ) ( sC C sR R R R g s H m + ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ + = () [] -(16) - - - F -(15) - - - R * z 4 9 4 6 5 5 * * 2 1 * C R R R R g s H m π = ⎟⎟ ⎠ ⎞ ⎜⎜ ⎝ ⎛ + = ( ) s o ESR o F 1/10 ~ 1/5 F and F F * ≤ > -(17) - - - m LC in ESR o osc g R F V R R F F V R * * * ) ( * * * 5 2 6 5 4 + = |
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