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LPC1850 Datasheet(PDF) 21 Page - NXP Semiconductors

Part # LPC1850
Description  32-bit ARM Cortex-M3 MCU; up to 200 kB SRAM; Ethernet, two High-speed USB, LCD
PDF  84 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC1850 Datasheet(HTML) 21 Page - NXP Semiconductors

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LPC1850_30_20_10
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Objective data sheet
Rev. 1 — 3 January 2011
21 of 84
NXP Semiconductors
LPC1850/30/20/10
32-bit ARM Cortex-M3 microcontroller
PC_11[2]
L5
<tbd>
I/O
SDIO_D4 — SD/MMC data bus line 4.
I
USB1_ULPI_DIR — ULPI link DIR signal. Controls the ULP data line
direction.
I
U1_DCD — Data Carrier Detect input for UART 1.
-n.c.
PC_12[2]
L6
<tbd>
I/O
SDIO_D5 — SD/MMC data bus line 5.
-n.c.
O
U1_DTR — Data Terminal Ready output for UART 1. Can also be configured
to be an RS-485/EIA-485 output enable signal for UART 1.
-n.c.
PC_13[2]
M1
<tbd>
I/O
SDIO_D6 — SD/MMC data bus line 6.
-n.c.
O
U1_TXD — Transmitter output for UART 1.
-n.c.
PC_14[2]
N1
<tbd>
I/O
SDIO_D7 — SD/MMC data bus line 7.
-n.c.
I
U1_RXD — Receiver input for UART 1.
-n.c.
PD_0[2]
N2
<tbd>
-
n.c.
O
CTOUT_15 — SCT output 15. Match output 3 of timer 3.
O
EXTBUS_DQMOUT2 — Data mask 2 used with SDRAM and static devices.
-n.c.
PD_1[2]
P1
<tbd>
-
n.c.
-n.c.
O
EXTBUS_CKEOUT2 — SDRAM clock enable 2.
-n.c.
PD_2[2]
R1
<tbd>
-
n.c.
O
CTOUT_7 — SCT output 7. Match output 3 of timer 1.
I/O
EXTBUS_D16 — External memory data line 16.
-n.c.
PD_3[2]
P4
<tbd>
-
n.c.
O
CTOUT_6 — SCT output 7. Match output 2 of timer 1.
I/O
EXTBUS_D17 — External memory data line 17.
-n.c.
PD_4[2]
T2
<tbd>
-
n.c.
O
CTOUT_8 — SCT output 8. Match output 0 of timer 2.
I/O
EXTBUS_D18 — External memory data line 18.
-n.c.
Table 3.
Pin description …continued
Symbol
Reset
state
[1]
Type Description



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