Analogue Control Interface

FX839

© 1997 Consumer Microcircuits Limited

11

D/839/4

CLOCK/IRQ CONTROL Register (Hex Address $D0)

This register controls the ADC clock divide ratio:

Bits 7 to 3

Reserved for future use. These bits should be set to '0'.

DIVIDER

(Bit 2 to Bit 0)

The input clock divide ratio, which sets the ADC clock frequency is defined in the

following table:

Bit 2

Bit 1

Bit 0

Function

0

0

0

Powersave

001

÷1

010

÷2

011

÷4

100

÷8

101

÷16

110

÷32

111

÷64