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HT83F02 Datasheet(PDF) 22 Page - Holtek Semiconductor Inc |
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HT83F02 Datasheet(HTML) 22 Page - Holtek Semiconductor Inc |
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22 / 64 page ![]() HT83F02 Rev. 1.20 22 November 19, 2010 Timer Control Registers - TMR0C, TMR1C Each timer has its respective timer control register, known as TMR0C and TMR1C. It is the timer control register together with their corresponding timer registers that control the full operation of the timers. Before the timers can be used, it is essential that the appropriate timer control register is fully programmed with the right data to ensure its correct operation, a process that is normally carried out during program initialization. Bits 7 and 6 of the Timer Control Register, must be set to the required logic levels. Bit 6 of the registers must always be written with a ²1², and bit 7 must always be written with a ²0². The timer-on bit, which is bit 4 of the Timer Control Register and known as T0ON/ T1ON, depend- ing upon which timer is used, provides the basic on/off control of the respective timer. setting the bit high allows the timer to run, clearing the bit stops the timer. For the 8-bit timers, which have prescalers, bits 0~2 of the Timer Control Register determines the division ratio of the input clock prescaler. Configuring the Timer The Timer is used to measure fixed time intervals, pro- viding an internal interrupt signal each time the Timer overflows. To do this the Operating Mode Select bit pair in the Timer Control Register must be set to the correct value as shown. Control Register Operating Mode Select Bits Bit7 Bit6 10 The internal clock, f SYS, is used as the Timer clock. How- ever, this clock source is further divided by a prescaler, the value of which is determined by the Prescaler Rate Select bits, which are bits 0~2 in the Timer Control Reg- ister. After the other bits in the Timer Control Register have been setup, the enable bit, which is bit 4 of the Timer Control Register, can be set high to enable the Timer to run. Each time an internal clock cycle occurs, the Timer increments by one. When it is full and over- flows, an interrupt signal is generated and the Timer will reload the value already loaded into the preload register and continue counting. The interrupt can be disabled by ensuring that the Timer Interrupt Enable bit in the Inter- rupt Control Register, INTC, is reset to zero. Prescaler All of the 8-bit timers possess a prescaler. Bits 0~2 of their associated timer control register, define the pre-scaling stages of the internal clock source of the Timer. The Timer overflow signal can be used to gener- ate signals for the Timer interrupt. Programming Considerations The internal system clock is used as the timer clock source and is therefore synchronized with the overall operation of the microcontroller. In this mode, when the appropriate timer register is full, the microcontroller will generate an internal interrupt signal directing the pro- gram flow to the respective internal interrupt vector. When the Timer is read, the clock is blocked to avoid er- rors, however as this may result in a counting error, this should be taken into account by the programmer. Care must be taken to ensure that the timers are properly ini- tialized before using them for the first time. The associ- ated timer enable bits in the interrupt control register must be properly set otherwise the internal interrupt associated with the timer will remain inactive. The edge select, timer mode and clock source control bits in timer control regis- ter must also be correctly set to ensure the timer is prop- erly configured for the required application. It is also important to ensure that an initial value is first loaded into the timer registers before the timer is switched on; this is because after power-on the initial values of the timer reg- isters are unknown. After the timer has been initialized the timer can be turned on and off by controlling the en- able bit in the timer control register. I n c r e m e n t T i m e r C o n t r o l l e r P r e s c a l e r O u t p u t T i m e r + 1 T i m e r + 2 T i m e r + N T i m e r + N + 1 Timer Mode Timing Diagram |
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