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HT68F13 Datasheet(PDF) 44 Page - Holtek Semiconductor Inc

Part # HT68F13
Description  Enhanced I/O Flash Type MCU
PDF  161 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT68F13 Datasheet(HTML) 44 Page - Holtek Semiconductor Inc

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LowVoltageReset
- LVR
The microcontroller contains a low voltage reset circuit in order to monitor the supply voltage of the
device. The LVR function is selected via a configuration option. If the supply voltage of the device
drops to within a range of 0.9V~VLVR such as might occur when changing the battery, the LVR will
automatically reset the device internally. For a valid LVR signal, a low supply voltage, i.e., a voltage in the
range between 0.9V~VLVR must exist for a time greater than that specified by tLVR in the A.C. characteristics.
If the low supply voltage state does not exceed this value, the LVR will ignore the low supply voltage and
will not perform a reset function. The actual VLVR value can be selected via configuration options.
WatchdogTime-outResetduringNormalOperation
The Watchdog time-out Reset during normal operation is the same as a hardware RES pin reset except
that the Watchdog time-out flag TO will be set to
²1².
WatchdogTime-outResetduringSLEEPorIDLEMode
The Watchdog time-out Reset during SLEEP or IDLE Mode is a little different from other kinds of
reset. Most of the conditions remain unchanged except that the Program Counter and the Stack Pointer
will be cleared to
²0² and the TO flag will be set to ²1². Refer to the A.C. Characteristics for t
SST details.
Rev.1.10
44
February9,2011
HT68F13/HT68F14/HT68F15
EnhancedI/OFlashType MCU
L V R
I n t e r n a l R e s e t
t R S T D + t S S T
Note: tRSTD ispower-ondelay,typicaltime=100ms
LowVoltageResetTimingChart
t R S T D + t S S T
W D T T i m e - o u t
I n t e r n a l R e s e t
Note: tRSTD ispower-ondelay,typicaltime=100ms
WDT Time-outResetduringNormalOperationTimingChart
t S S T
W D T T i m e - o u t
I n t e r n a l R e s e t
Note:
The tSST is15~16clockcyclesifthesystemclocksourceisprovidedby ERC or HIRC.
The tSST is1024clockfor HXT.The tSST is1~2clockfor LIRC.
WDT Time-outResetduringSLEEP orIDLETimingChart



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