PCF2123 datasheet(28/63 Pages) NXP

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PCF2123

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Product data sheet

Rev. 5 — 27 April 2011

28 of 63

NXP Semiconductors

PCF2123

SPI Real time clock/calendar

8.8 Clock output

A programmable square wave is available at pin CLKOUT. Operation is controlled by the

COF[2:0] bits in the register Timer_clkout. Frequencies of 32.768 kHz (default) down to

1 Hz can be generated for use as a system clock, microcontroller clock, input to a charge

pump, or for calibration of the oscillator.

Pin CLKOUT is an open-drain output and enabled at power-on. When disabled the output

is high-impedance.

The duty cycle of the selected clock is not controlled. However, due to the nature of the

clock generation, all will be 50 : 50 except the 32.768 kHz frequencies.

The STOP bit function can also affect the CLKOUT signal, depending on the selected

frequency. When the STOP bit is set logic 1, the CLKOUT pin will generate a continuous

LOW for those frequencies that can be stopped. For more details of the STOP bit function

see Section 8.11.

[1]

Duty cycle definition: % HIGH-level time : % LOW-level time.

[2]

1 Hz clock pulses will be affected by offset correction pulses.

8.8.1 CLKOE pin

The CLKOE pin can be used to block the CLKOUT function and force the CLKOUT pin to

a high-impedance state. The effect is the same as setting COF[2:0] = 111.

Table 35.

CLKOUT frequency selection

Bits COF[2:0]

CLKOUT frequency (Hz) Typical duty cycle[1]

Effect of STOP bit

000

32768

60 : 40 to 40 : 60

no effect

001

16384

50 : 50

no effect

010

8192

50 : 50

no effect

011

4096

50 : 50

CLKOUT = LOW

100

2048

50 : 50

CLKOUT = LOW

101

1024

50 : 50

CLKOUT = LOW

110

1[2]

50 : 50

CLKOUT = LOW

111

CLKOUT = high-Z

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