H-Bridge and Dual Half Bridge Driver IC

TLE7181EM

Data Sheet

24

Rev 1.1, 2010-09-30

5.3.10

High level output voltage of ISO

V

OH

4.75

–

5.2

V

I

5.3.11

Output short circuit current

I

SCOP

5

––mA

–

5.3.12

R

I

100

––k

Ω

–

5.3.13

Common mode input capacitance1)

C

CM

–

–

10

pF

10kHz

5.3.14

Common mode rejection ratio at

DC

CMRR =

20*Log((Vout_diff/Vin_diff) *

(Vin_CM/Vout_CM))

C

MRR

80

100

–

dB

–

5.3.15

CMS = 20*Log(Vout_CM/Vin_CM)

Freq =100kHz

Freq = 1MHz

Freq = 10MHz

C

MS

–

62

43

23

–dB

V

sin(2*

π*freq*t);

R

R

5.3.16

Slew rate

d

V/dt

–10

–

V/µs

Gain

≥ 5;

R

C

5.3.17

Large signal open loop voltage gain

(DC)

A

OL

80

100

–

dB

–

5.3.18

Unity gain bandwidth1)

G

BW

10

20

–

MHz

R

5.3.19

Phase margin 1)

F

M

–50

–

°

Gain

≥ 5;

R

5.3.20

Gain margin 1)

A

M

–12

–

dB

R

5.3.21

Bandwidth

B

WG

0.7

1.3

–

MHz

Gain=15;

R

C

R

5.3.22

Output settle time to 98%

t

set1

–

1

1.8

µs

Gain=15;

R

C

0.3<

V

R

5.3.23

Output settle time to 98%1)

t

set2

–

4.6

–

µs

Gain=75;

R

C

0.3<

V

R

1) Not subjected to production test; specified by design

2) Without considering any offsets such as input offset voltage, internal mismatch and assuming no tolerance error in external

resistors.

Electrical Characteristics - Current sense signal conditioning (cont’d)

V

(unless otherwise specified)

Pos.

Parameter

Symbol

Limit Values

Unit

Conditions

Min.

Typ.

Max.