ACS8510 datasheet(8/69 Pages) SEMTECH

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Revision 2.07/Jan 2001 ã2001 Semtech Corp

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ACS8510 SETS

ADVANCED COMMUNCIATIONS

FINAL

reference input and generate the T

OUT0 clock,

the 8 kHz Frame Synchronisation clock and

the 2 kHz Multi-Frame Synchronisation clock

with the same phase. The ACS8510 includes a

microprocessor port, providing access to the

configuration and status registers for device

setup and monitoring.

Local Oscillator Clock

The Master system clock on the ACS8510

should be provided by an external clock oscillator

of frequency 12.80 MHz. The clock specification

is important for meeting the ITU/ETSI and

Telcordia performance requirements in Holdover

mode. ITU and ETSI specifications permit a

combined drift characteristic, at constant

temperature, of all non-temperature-related

parameters, of up to 10 ppb per day. The same

specifications allow a drift of 1 ppm over a

temperature range of 0 to 70 Celsius. Telcordia

specifications are somewhat tighter, requiring

a non-temperature-related drift of less than 40

ppb per day and a drift of 280 ppb over the

temperature range 0 to 50 Celsius.

ITU and ETSI specification

Tolerance:

+/- 4.6 ppm over 20 year life time.

Drift*:

+/- 0.05 ppm/15 seconds @ constant temp.

+/- 0.01 ppm/day @ constant temp.

+/- 1 ppm over temp. range 0-70 Celsius

*Frequency drift over supply voltage range of 2.7 V to 3.3 V.

Telcordia GR-1244 CORE specification

Tolerance:

+/- 4.6 ppm over 20 year life time.

Drift*:

+/- 0.05 ppm/15 seconds @ constant temp.

+/- 0.04 ppm/day @ constant temp.

+/- 0.28 ppm over temp. range 0-50 Celsius

*Frequency drift over supply voltage range of 2.7 V to 3.3 V.

Please contact Semtech for information on

crystal oscillator suppliers.

Crystal Frequency Calibration

The absolute crystal frequency accuracy is less

important than the stability since any frequency

offset can be compensated by adjustment of

calibration and compensation of any crystal

frequency variation away from its nominal value.

+/- 50 ppm adjustment would be sufficient to

cope with most crystals, in fact the range is an

order of magnitude larger due to the use of

two 8 bit register locations. The setting of the

conf_nominal_frequency register allows for this

adjustment. An increase in the register value

increases the output frequencies by 0.02 ppm

for each LSB step. The default value (in decimal)

is 39321. The minimum being 0 and the

maximum 65535, gives a +500 ppm to -700

ppm adjustment range of the output

frequencies.

For example, if the crystal was oscillating at

12.8 MHz + 5 ppm, then the calibration value

in the register to give a -5 ppm adjustment in

output frequencies to compensate for the

crystal inaccuracy, would be : 39321 - (5 /

0.02) = 39071 (decimal).

Input Interfaces

The ACS8510 supports up to fourteen input

reference clock sources from input types T

IN1,

IN2 and TIN3 using TTL, CMOS, PECL, LVDS and

AMI buffer I/O technologies. These interface

technologies support 3.3 V and 5 V operation.

Over-Voltage Protection

The ACS8510 may require Over-Voltage

Protection on input reference clock ports

according to the ITU Recommendation K.41.

Semtech recommends the use of their

protection devices for this purpose (see

separate Semtech data book).

ACS8510 Datasheet(PDF) 8 Page - Semtech Corporation

ACS8510 Datasheet(HTML) 8 Page - Semtech Corporation

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