MSP430F449IPZ datasheet(52/79 Pages) TI

52 / 79 page

MSP430x43x1, MSP430x43x, MSP430x44x1, MSP430x44x

MIXED SIGNAL MICROCONTROLLER

SLAS344G − JANUARY 2002 − REVISED OCTOBER 2009

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature (unless otherwise

noted) (continued)

12-bit ADC, built-in reference

PARAMETER

TEST CONDITIONS

VCC

MIN

TYP

MAX

UNIT

Positive built-in reference voltage

REF2_5V = 1 for 2.5 V

IVREF+ ≤ IVREF+max

3 V

2.4

2.5

2.6

VREF+

Positive built in reference voltage

output

REF2_5V = 0 for 1.5 V

IVREF+ ≤ IVREF+max

2.2 V/3 V

1.44

1.5

1.56

i i

iti

REF2_5V = 0, IVREF+ ≤ 1mA

2.2

AVCC(min)

AVCC minimum voltage, Positive

built-in reference active

REF2_5V = 1, IVREF+ ≤ 0.5mA

VREF+ + 0.15

AVCC(min)

built-in reference active

REF2_5V = 1, IVREF+ ≤ 1mA

VREF+ + 0.15

Load current out of V

terminal

2.2 V

0.01

−0.5

IVREF+

Load current out of VREF+ terminal

3 V

−1

IVREF+ = 500 µA +/− 100 µA

Analog input voltage 0 75 V;

2.2 V

±2

LSB

Load-current regulation VREF+

Analog input voltage ~0.75 V;

REF2_5V = 0

3 V

±2

LSB

IL(VREF)+

Load current regulation VREF+

terminal

IVREF+ = 500 µA ± 100 µA

Analog input voltage ~1.25 V;

REF2_5V = 1

3 V

±2

LSB

Load current regulation VREF+

IVREF+ =100 µA → 900 µA,

µF Ax 05xV

IDL(VREF) +

Load current regulation VREF+

terminal

CVREF+=5 µF, Ax ~0.5 x VREF+

Error of conversion result

≤ 1 LSB

3 V

CVREF+

Capacitance at pin VREF+

(see Note 1)

REFON =1,

0 mA

≤ IVREF+ ≤ IVREF+max

2.2 V/3 V

µF

TREF+

Temperature coefficient of built-in

reference

IVREF+ is a constant in the range of

0 mA

≤ IVREF+ ≤ 1 mA

2.2 V/3 V

±100 ppm/°C

tREFON

Settle time of internal reference

voltage (see Figure 18 and Note 2)

IVREF+ = 0.5 mA, CVREF+ = 10µF,

VREF+ = 1.5 V

2.2 V

NOTES:

1. The internal buffer operational amplifier and the accuracy specifications require an external capacitor. All INL and DNL tests uses

two capacitors between pins VREF+ and AVSS and VREF−/VeREF− and AVSS: 10 µF tantalum and 100 nF ceramic.

2. The condition is that the error in a conversion started after tREFON is less than ±0.5 LSB. The settling time depends on the external

capacitive load.

CVREF+

µF

1 ms

10 ms

100 ms

tREFON

tREFON ≈ .66 x CVREF+ [ms] with CVREF+ in µF

100

µF

Figure 18. Typical Settling Time of Internal Reference tREFON vs External Capacitor on VREF+

MSP430F449IPZ Datasheet(PDF) 52 Page - Texas Instruments

MSP430F449IPZ Datasheet(HTML) 52 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79

Datasheet Download

Link URL