LH28F008SC datasheet(33/38 Pages) SHARP

33 / 38 page

8M (1M × 8) Flash Memory

LH28F008SC

Figure 18. AC Waveform for Reset Operation

RESET OPERATIONS

SYMBOL

PARAMETER

CC = 3.3 V

CC = 5 V

UNIT

NOTE

MIN.

MAX.

MIN.

MAX.

PLPH

» Pulse Low Time (If RP» is tied to V

CC, this

specification is not applicable)

100

PLRH

» Low to Reset during Block Erase, Byte Write, or

Lock-Bit Configuration

µs

2,3

Reset AC Specifications1

NOTES:

1. These specifications are valid for all product versions (packages and speeds).

2. If RP

» is asserted while a block erase, byte write, or lock-bit configuration operation is not executing,

the reset will complete within 100 ns.

3. A reset time tPHQV, is required from the latter of RY »/BY » or RP » going high until outputs are valid.

tPLPH

tPLRH

RP (P)

VIH

VIL

RY/BY (R)

VIH

VIL

RY/BY (R)

A. Reset During Read Array Mode

B. Reset During Block Erase, Byte Write, or Lock-Bit Configuration

VIH

VIL

RP (P)

VIH

VIL

28F008SC-18

LH28F008SC Datasheet(PDF) 33 Page - Sharp Corporation

LH28F008SC Datasheet(HTML) 33 Page - Sharp Corporation

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