LPC1102 datasheet(22/39 Pages) NXP

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LPC1102

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Product data sheet

Rev. 4 — 24 June 2011

22 of 39

NXP Semiconductors

LPC1102

32-bit ARM Cortex-M0 microcontroller

Conditions: Tamb = 25 C; active mode entered executing code while(1){} from flash; all

peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL= 0x1F); all peripheral

clocks disabled; internal pull-up resistors disabled; BOD disabled; low-current mode.

(1) System PLL disabled; IRC enabled.

(2) System PLL enabled; IRC disabled.

Fig 6.

Active mode: Typical supply current IDD versus supply voltage VDD for different

system clock frequencies

Conditions: VDD = 3.3 V; active mode entered executing code while(1){} from flash; all

peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL= 0x1F); all peripheral

clocks disabled; internal pull-up resistors disabled; BOD disabled; low-current mode.

(1) System PLL disabled; IRC enabled.

(2) System PLL enabled; IRC disabled.

Fig 7.

Active mode: Typical supply current IDD versus temperature for different system

clock frequencies

VDD (V)

1.8

3.6

3.0

2.4

002aaf980

IDD

(mA)

12 MHz(1)

24 MHz(2)

36 MHz(2)

48 MHz(2)

002aaf981

temperature (

°C)

−40

−15

IDD

(mA)

12 MHz(1)

24 MHz(2)

36 MHz(2)

48 MHz(2)

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