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LPC4350 Datasheet(PDF) 85 Page - NXP Semiconductors |
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LPC4350 Datasheet(HTML) 85 Page - NXP Semiconductors |
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85 / 149 page ![]() LPC4350_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Objective data sheet Rev. 3.1 — 5 January 2012 85 of 149 NXP Semiconductors LPC4350/30/20/10 32-bit ARM Cortex-M4/M0 microcontroller 7.21.1.1 Features • Measures the passage of time to maintain a calendar and clock. Provides seconds, minutes, hours, day of month, month, year, day of week, and day of year. • Ultra-low power design to support battery powered systems. Less than <tbd> required for battery operation. Uses power from the CPU power supply when it is present. • Dedicated battery power supply pin. • RTC power supply is isolated from the rest of the chip. • Calibration counter allows adjustment to better than 1 sec/day with 1 sec resolution. • Periodic interrupts can be generated from increments of any field of the time registers. • Alarm interrupt can be generated for a specific date/time. 7.21.2 Alarm timer The alarm timer is a 16-bit timer and counts down at 1 kHz from a preset value generating alarms in intervals of up to 1 min. The counter triggers a status bit when it reaches 0x00 and asserts an interrupt if enabled. The alarm timer is part of the RTC power domain and can be battery powered. 7.22 System control 7.22.1 Configuration registers (CREG) The following settings are controlled in the configuration register block: • BOD trip settings • Oscillator output • DMA-to-peripheral muxing • Ethernet mode • Memory mapping • Timer/USART inputs • Enabling the USB controllers In addition, the CREG block contains the part identification and part configuration information. 7.22.2 System Control Unit (SCU) The system control unit determines the function and electrical mode of the digital pins and allows switching between analog and digital modes of pads that are capable of both modes. By default function 0 is selected for all pins with pull-up enabled. Analog I/Os like one set of the ADC and the DAC pins as well as most USB functions reside on separate pins and are not controlled through the SCU. 7.22.3 Clock Generation Unit (CGU) The Clock Generator Unit (CGU) generates several base clocks. The CGU outputs are unrelated in frequency and phase and can have different clock sources within the CGU. One CGU output is routed to the CLKOUT pins. |
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