HT67F60 datasheet(116/242 Pages) HOLTEK

116 / 242 page

Rev. 1.50

116

March 06 , 2012

Rev. 1.50

117

March 06 , 2012

HT67F30/HT67F40/HT67F50/HT67F60

TinyPowerTM A/D Flash Type 8-Bit MCU with LCD & EEPRO

Counter Value

0x3FF

CCRP

CCRA

TnON

TnPAU

TnPOL

CCRP Int.

Flag TnPF

CCRA Int.

Flag TnAF

TM O/P Pin

Time

CCRA=0

CCRA = 0

Counter overflow

CCRA > 0 Counter cleared by CCRA value

Pause

Resume

Stop

Counter Restart

TnCCLR = 1; TnM [1:0] = 00

Output pin set to

initial Level Low

if TnOC=0

Output Toggle with

TnAF flag

Note TnIO [1:0] = 10

Active High Output select

Here TnIO [1:0] = 11

Toggle Output select

Output not affected by

TnAF flag. Remains High

until reset by TnON bit

Output Pin

Reset to Initial value

Output controlled by

other pin-shared function

Output Inverts

when TnPOL is high

TnPF not

generated

No TnAF flag

generated on

CCRA overflow

Output does

not change

Compare Match Output Mode — TnCCLR = 1

Note: 1. With TnCCLR=1, a Comparator A match will clear the counter

2. The TM output pin is controlled only by the TnAF flag

3. The output pin is reset to its initial state by a TnON bit rising edge

4. The TnPF flag is not generated when TnCCLR=1

PWM Output Mode

To select this mode, bits TnM1 and TnM0 in the TMnC1 register should be set to 10 respectively.

The PWM function within the TM is useful for applications which require functions such as motor

control, heating control, illumination control etc. By providing a signal of fixed frequency but of

varying duty cycle on the TM output pin, a square wave AC waveform can be generated with

varying equivalent DC RMS values.

As both the period and duty cycle of the PWM waveform can be controlled, the choice of generated

waveform is extremely flexible. In the PWM mode, the TnCCLR bit has no effect on the PWM

operation. Both of the CCRA and CCRP registers are used to generate the PWM waveform, one

the other one is used to control the duty cycle. Which register is used to control either frequency or

duty cycle is determined using the TnDPX bit in the TMnC1 register. The PWM waveform

frequency and duty cycle can therefore be controlled by the values in the CCRA and CCRP registers.

An interrupt flag, one for each of the CCRA and CCRP, will be generated when a compare match

occurs from either Comparator A or Comparator P. The TnOC bit in the TMnC1 register is used to

select the required polarity of the PWM waveform while the two TnIO1 and TnIO0 bits are used to

enable the PWM output or to force the TM output pin to a fixed high or low level. The TnPOL bit is

used to reverse the polarity of the PWM output waveform.

HT67F60 Datasheet(PDF) 116 Page - Holtek Semiconductor Inc

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