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AD5064 Datasheet(PDF) 15 Page - Analog Devices |
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AD5064 Datasheet(HTML) 15 Page - Analog Devices |
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15 / 36 page ![]() Data Sheet AD5750/AD5750-1/AD5750-2 Rev. D | Page 15 of 36 12 10 8 6 4 2 0 27 22 17 12 7 2 –3 –8 TIME (µs) Figure 17. Full-Scale Positive Step 12 10 8 6 4 2 0 27 22 17 12 7 2 –3 –8 TIME (µs) Figure 18. Full-Scale Negative Step 40 35 30 25 20 15 10 5 0 –5 2.5 2.0 1.5 1.0 0.5 0 –0.5 –1.0 TIME (ms) Figure 19. VOUT vs. Time on Power-Up, Load = 2 kΩ || 200 pF CH1 5.00V CH2 20.0mV BW M1.0µs A CH1 3.00V 1 2 Figure 20. VOUT Enable Glitch, Load = 2 kΩ || 1 nF 5µV/DIV 1s/DIV Figure 21. Peak-to-Peak Noise (0.1 Hz to 10 Hz Bandwidth) 100µV/DIV 1s/DIV Figure 22. Peak-to-Peak Noise (100 kHz Bandwidth) |
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