AD5064 datasheet(20/36 Pages) AD

20 / 36 page

AD5750/AD5750-1/AD5750-2

Data Sheet

Rev. D | Page 20 of 36

0.020

0.015

–0.015

–0.010

–0.005

0.005

0.010

105

–40

TEMPERATURE (°C)

AVDD = +24V

AVSS = –24V

+4mA TO +20mA EXTERNAL RSET

0mA TO +20mA EXTERNAL RSET

0mA TO +24mA EXTERNAL RSET

±20mA EXTERNAL RSET

±24mA EXTERNAL RSET

Figure 42. Gain Error vs. Temperature, External RSET Sense Resistor

0.08

–0.10

–0.08

–0.06

–0.04

–0.02

0.04

0.02

0.06

105

–40

TEMPERATURE (°C)

AVDD = +24V

AVSS = –24V

+4mA TO +20mA INTERNAL RSET

0mA TO +20mA INTERNAL RSET

0mA TO +24mA INTERNAL RSET

±20mA INTERNAL RSET

±24mA INTERNAL RSET

Figure 43. Gain Error vs. Temperature, Internal RSET Sense Resistor

1.4

1.2

1.0

0.8

0.6

0.4

0.2

105

–40

TEMPERATURE (°C)

AVDD COMPLIANCE

AVSS COMPLIANCE

Figure 44. Output Compliance vs. Temperature

Tested When IOUT = 10.8 mA, ±24 mA Range Selected

–2

0.000010

–0.000010

–0.000008

–0.000006

–0.000004

–0.000002

0.000002

0.000004

0.000006

0.000008

VDD

IOUT

–10

–8

–6

–4

–2

TIME (ms)

Figure 45. VDD and Output Current (IOUT) vs. Time-On Power-Up

–18

–16

–14

–12

–10

–8

–6

–4

–2

–1

TIME (µs)

Figure 46. Output Current (IOUT) vs. Time-On Output Enable

0.025

0.020

0.015

0.010

0.005

–12

–6

TIME (µs)

Figure 47. 4 mA to 20 mA Output Current Step

AD5064 Datasheet(PDF) 20 Page - Analog Devices

AD5064 Datasheet(HTML) 20 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

Datasheet Download

Link URL