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LM3447MT/NOPB Datasheet(PDF) 16 Page - Texas Instruments

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Part # LM3447MT/NOPB
Description  Phase Dimmable, Primary Side Power Regulated PFC Flyback Controller for LED Lighting
PDF  25 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LM3447MT/NOPB Datasheet(HTML) 16 Page - Texas Instruments

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V
FLT 2
V
RAMP
V
SW
V
GATE
time
1.2V
1V
T
S = TRAMP + 0.5TOSC
T
S = TRAMP
EN
HOLD
LM3447
SNOSC65 A – APRIL 2012 – REVISED MAY 2012
www.ti.com
Valley switching is implemented by connecting the transformer auxiliary winding to the AUX input of LM3447
through a resistor divider network, RAUX1 and RAUX2, as shown in Figure 24 (a). The valley level is detected by
monitoring the current sourced out of the AUX pin when the voltage at the auxiliary winding of the transformer is
negative with respect to the GND node. The voltage at this node is clamped at approximately 100mV by the
internal circuitry to protect the device during negative voltage excursions of the auxiliary winding. The waveforms
in Figure 24(b) illustrate the sequence of events that have to occur for the LM3447 to initiate a new switching
cycle.
An internal 14.5
μs timer is started at the same time as the switching FET (QSW) is turned on. This 14.5μs timer,
set by the internal ramp rise time, is used to set the maximum frequency. After this timer expires the switching
FET (QSW) is allowed to turn back on if a valley is detected (VAL) or the 4µs (tAUX(TO)) catch timer expires. The
catch timer starts immediately after the Ramp signal drops and sets the lowest operating frequency.
The particular valley (1st, 2nd …) in the ringing waveform, where the switch is enabled is a function of the input
voltage and varies over the half line cycle. As a result, the AUX circuit shows increased sensitivity where the
valley detect signal, VAL, overlaps the Ramp period. Here, the switching point is observed to randomly jump
between two adjacent valleys, causing a discrete change in the switching period. Such perturbations in switching
frequency cause the switching ripple component of the input current to increase and interfere with phase
dimming performance. Therefore, valley switching is disabled and hard switching operation with fixed Ramp
period is initiated on detection of external phase dimmers, as shown in Figure 25. The valley switching operation
is controlled by the FLT2 input. The operation is disabled when the VFLT2 falls below 1V and is enabled again
when it rises above 1.2V. A 200mV hysteresis is provided for noise immunity.
A second function of AUX pin is to program the output overvoltage protection or open-LED detection feature. The
output voltage is monitored by sampling the voltage at the auxiliary winding. The voltage is sampled after a fixed
delay of 1.84
μs, from the falling edge of the GATE drive signal. The leading edge blanking circuit helps reject the
voltage transients caused by the leakage energy of the transformer thus preventing false tripping of OVP. The
fault condition is detected when the AUX voltage exceeds the internal threshold, VAUX(OVP) (1.75V). In the case of
an overvoltage fault, the switch is turned off for 812ms before attempting to restart the circuit. During this fault
period, the compensation capacitor (CCOMP) is discharged, and the control loop is disabled. When the fault is
cleared, the 812ms fault timer is disengaged and the control loop is activated to resume normal operation.
Figure 25. Waveforms Illustrating Valley Switching Enable and Disable Sequence
The sizing of resistor RAUX1 and RAUX2 govern the AUX circuit behavior. Resistor RAUX1 is also used to limit the
maximum source current from the AUX pin to 200
μA and is based on the maximum input voltage and the
transformer primary to auxiliary turns-ratio;
16
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Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LM3447



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