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TMS320TCI100QGLZ Datasheet(PDF) 49 Page - Texas Instruments

Part # TMS320TCI100QGLZ
Description  FIXED-POINT DIGTAL SIGNAL PROCESSOR
PDF  137 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS320TCI100QGLZ Datasheet(HTML) 49 Page - Texas Instruments

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TMS320TCI100Q
FIXEDPOINT DIGITAL SIGNAL PROCESSOR
SPRS251E − JUNE 2004 − REVISED JUNE 2006
49
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
Terminal Functions (Continued)
SIGNAL
TYPE†
IPD/
‡
DESCRIPTION
NAME
NO.
TYPE†
IPD/
IPU‡
DESCRIPTION
EMIFB (16-BIT) − ADDRESS||k
BEA20
E16
IPU
EMIFB external address (half-word address) (O/Z)
• Also controls initialization of DSP modes at reset (I) via pullup/pulldown resistors
− Device Endian mode
BEA19
D18
IPU
Also controls initialization of DSP modes at reset (I) via pullup/pulldown resistors
− Device Endian mode
BEA20:
0
–
Big Endian
BEA18
C18
BEA20:
0
–
Big Endian
1
− Little Endian (default mode)
− Boot mode
BEA17
B18
− Boot mode
BEA[19:18]: 00 –
No boot
01 − HPI boot
BEA16
A18
01 − HPI boot
10 − EMIFB 8-bit ROM boot with default timings (default mode)
11 − Reserved
BEA15
D17
11 − Reserved
− EMIF clock select
BEA14
C17
− EMIF clock select
BEA[17:16]: Clock mode select for EMIFA (AECLKIN_SEL[1:0])
00 –
AECLKIN (default mode)
BEA13
B17
00 –
AECLKIN (default mode)
01 − CPU/4 Clock Rate
10 − CPU/6 Clock Rate
BEA12
A17
10 − CPU/6 Clock Rate
11 − Reserved
BEA11
D16
BEA[15:14]: Clock mode select for EMIFB (BECLKIN_SEL[1:0])
00 –
BECLKIN (default mode)
BEA10
C16
I/O/Z
IPD
00 –
BECLKIN (default mode)
01 − CPU/4 Clock Rate
10 − CPU/6 Clock Rate
BEA9
B16
I/O/Z
IPD
10 − CPU/6 Clock Rate
11 − Reserved
BEA8
A16
− PCI EEPROM Auto-Initialization (EEAI)
BEA13:
PCI auto-initialization via external EEPROM
BEA7
D15
− PCI EEPROM Auto-Initialization (EEAI)
BEA13:
PCI auto-initialization via external EEPROM
If the PCI peripheral is disabled (PCI_EN pin = 0), this pin must not be pulled up.
0
− PCI auto-initialization through EEPROM is disabled (default).
BEA6
C15
If the PCI peripheral is disabled (PCI_EN pin = 0), this pin must not be pulled up.
0
− PCI auto-initialization through EEPROM is disabled (default).
1
− PCI auto-initialization through EEPROM is enabled.
BEA5
B15
1
− PCI auto-initialization through EEPROM is enabled.
− UTOPIA Enable (UTOPIA_EN)
BEA4
A15
− UTOPIA Enable (UTOPIA_EN)
BEA11:
UTOPIA peripheral enable (functional)
0
− UTOPIA disabled (McBSP1 enabled) [default]
BEA3
D14
0
− UTOPIA disabled (McBSP1 enabled) [default]
1
− UTOPIA enabled (McBSP1 disabled)
BEA2
C14
For proper device operation, the BEA8 and BEA9 pins must be externally pulled up
with a 1-k
Ω resistor.
BEA1
A14
with a 1-k
Ω resistor.
For more details, see the Device Configurations section of this data sheet.
† I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground
‡ IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-kΩ IPD or IPU resistor. To pull up a signal to the opposite
supply rail, a 1-k
Ω resistor should be used.)
|| These C64x devices have two EMIFs (64-bit EMIFA and 16-bit EMIFB). The prefix “A” in front of a signal name indicates it is an EMIFA signal
whereas a prefix “B” in front of a signal name indicates it is an EMIFB signal. Throughout the rest of this document, in generic EMIF areas of
discussion, the prefix “A” or “B” may be omitted from the signal name.
k To maintain signal integrity for the EMIF signals, serial termination resistors should be inserted into all EMIF output signal lines.



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