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CXD3017Q Datasheet(PDF) 9 Page - Sony Corporation |
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CXD3017Q Datasheet(HTML) 9 Page - Sony Corporation |
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9 / 117 page ![]() – 9 – CXD3017Q (2) CLOK, DATA, XLAT and SQCK pin (VDD = AVDD = 3.3 ± 0.3V, VSS = AVSS = 0V, Topr = –20 to +75°C) Clock frequency Clock pulse width Setup time Hold time Delay time Latch pulse width SQCK frequency SQCK pulse width fCK tWCK tSU tH tD tWL fT tWT 750 300 300 300 750 750 Note) 0.65 0.65 Note) MHz ns ns ns ns ns MHz ns Item Symbol Min. Typ. Max. Unit tWCK tWCK 1/fCK tH tSU tWL tD 1/fT tWT tWT tH tSU CLOK DATA XLAT SQCK SQSO Note) In quasi double-speed playback mode, except when SQSO is Sub Q Read, the SQCK maximum operating frequency is 300kHz and its minimum pulse width is 1.5µs. |
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