WM8326 datasheet(100/255 Pages) WOLFSON

100 / 255 page

WM8326

Production Data

PD, June 2012, Rev 4.0

100

The maximum voltage that can be measured on the input pins GPIO10, GPIO11 and GPIO12 is

determined by the power domain associated with each; this is selectable on a pin by pin basis using

the GPn_PWR_DOM register bits described in Section 21.3. The input voltage at the GPIO pin must

not exceed the voltage of the respective power domain (ie. DBVDD or PVDD).

In a typical application, it is anticipated that the AUXADC Interrupts would be used to control the

AUXADC readback - the host processor should read the AUXADC Data Register in response to the

AUXADC Interrupt event. See Section 18.5 for details of AUXADC Interrupts. In Automatic AUXADC

mode, the processor should complete this action before the next measurement occurs, in order to

avoid losing any AUXADC samples. In Manual conversion mode, the interrupt signal provides

confirmation that the commanded measurement has been completed.

The control fields associated with initiating AUXADC readback are defined in Table 46.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R16429

(402Dh)

AuxADC Data

15:12

AUX_DATA_SRC

[3:0]

000

AUXADC Data Source

1 = GPIO10

2 = GPIO11

3 = GPIO12

5 = Chip Temperature

7 = PVDD voltage

All other values are Reserved

11:0

AUX_DATA [11:0]

000h

AUXADC Measurement Data

Voltage (mV) = AUX_DATA x 1.465

ChipTemp (

C) = (498 - AUX_DATA)

/ 1.09

Table 46 AUXADC Readback

WM8326 Datasheet(PDF) 100 Page - Wolfson Microelectronics plc

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