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ADM1031

–16–

FILTERED CONTROL MODE

The Automatic Fan Speed Control Loop reacts instantaneously

to changes in temperature, i.e., the PWM duty cycle will respond

immediately to temperature change. In certain circumstances,

we may not want the PWM output to react instantaneously to

temperature changes. If significant variations in temperature

were found in a system, this would have the effect of changing

the fan speed, which could be obvious to someone in close prox-

imity. One way to improve the system’s acoustics would be to

slow down the loop so that the fan ramps slowly to its newly

calculated fan speed. This also ensures that temperature transients

will effectively be ignored, and the fan’s operation will be smooth.

There are two means by which to apply filtering to the Auto-

matic Fan Speed Control Loop. The first method is to ramp the

fan speed at a predetermined rate, to its newly calculated value

instead of jumping directly to the new fan speed. The second

approach involves changing the on-chip ADC sample rate, to

change the number of temperature readings taken per second.

The filtered mode on the ADM1031 is invoked by setting Bit 0

of the Fan Filter Register (Register 0x23) for Fan 1 and Bit 1

for Fan 2. Once the Fan Filter Register has been written to, and

all other control loop parameters (TMIN, TRANGE, etc.) have

been programmed, the device may be placed into Automatic

Fan Speed Control Mode by setting Bit 7 of Configuration

Effect of Ramp Rate on Filtered Mode

Bits <6:5> of the Fan Filter Register determine the ramp rate in

Filtered Mode. The PWM_OUT signal driving the fan will have

a period, T, given by the PWM_OUT drive frequency, f, since

T = 1/f. For a given PWM period, T, the PWM period is subdi-

vided in to 240 equal time slots. One time slot corresponds to

the smallest possible increment in PWM duty cycle. A PWM

signal of 33% duty cycle will thus be high for 1/3

× 240 time

slots and low for 2/3

× 240 time slots. Therefore, 33% PWM

duty cycle corresponds to a signal which is high for 80 time slots

and low for 160 time slots.

PWM_OUT

33% DUTY

CYCLE

160 TIME

SLOTS

80 TIME

SLOTS

PWM OUTPUT

(ONE PERIOD) =

240 TIME SLOTS

Figure 11. 33% PWM Duty Cycle Represented in Time

Slots

The ramp rates in Filtered Mode are selectable between 1, 2,

4, and 8. The ramp rates are actually discrete time slots. For

example, if the ramp rate = 8, then eight time slots will be added to

the PWM_OUT high duty cycle each time the PWM_OUT duty

cycle needs to be increased. Figure 12 shows how the Filtered

Mode algorithm operates.

INCREMENT

PREVIOUS PWM

VALUE BY RAMP

RATE

READ

TEMPERATURE

CALCULATE

NEW PWM

DUTY CYCLE

IS NEW

PWM VALUE >

VALUE?

DECREMENT

PWM VALUE

BY RAMP

RATE

YES

Figure 12. Filtered Mode Algorithm

The Filtered Mode algorithm calculates a new PWM duty cycle

based on the temperature measured. If the new PWM duty cycle

value is greater than the previous PWM value, the previous

PWM duty cycle value is incremented by either 1, 2, 4, or 8

time slots (depending on the setting of bits <6:5> of the Fan

Filter Register). If the new PWM duty cycle value is less than

the previous PWM value, the previous PWM duty cycle is dec-

remented by 1, 2, 4, or 8 time slots. Each time the PWM

duty cycle is incremented or decremented, it is stored as the

previous PWM duty cycle for the next comparison.

So what does an increase of 1, 2, 4, or 8 time slots actually mean

in terms of PWM duty cycle?

A Ramp Rate of 1 corresponds to one time slot, which is 1/240

of the PWM period. In Filtered Auto Fan Speed Control Mode,

incrementing or decrementing by 1 changes the PWM output

duty cycle by 0.416%.

Table VIII. Effect of Ramp Rates on PWM_OUT

Ramp Rate

PWM Duty Cycle Change

0.416%

0.833%

1.66%

3.33%

So programming a ramp rate of 1, 2, 4, or 8 simply increases

or decreases the PWM duty cycle by the amounts shown in

Table VIII, depending on whether the temperature is increas-

ing or decreasing.

Figure 13 shows remote temperature plotted against PWM duty

cycle for Filtered Mode. The ADC sample rate is the highest

sample rate; 11.25 kHz. The ramp rate is set to 8 which would

correspond to the fastest ramp rate. With these settings it took

approximately 12 seconds to go from 0% duty cycle to 100%

duty cycle (full-speed). The TMIN value = 32

°C and the T

RANGE

= 80

°C. It can be seen that even though the temperature increased

very rapidly, the fan gradually ramps up to full speed.

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