JS28F128J3C120 datasheet(43/72 Pages) INTEL

43 / 72 page

28F256J3, 28F128J3, 28F640J3, 28F320J3

Datasheet

After the final buffer data is given, a Write Confirm command is issued. This initiates the WSM

(Write State Machine) to begin copying the buffer data to the flash array. If a command other than

Write Confirm is written to the device, an “Invalid Command/Sequence” error will be generated

and SR.5 and SR.4 will be set. For additional buffer writes, issue another Write to Buffer Setup

command and check XSR.7.

If an error occurs while writing, the device will stop writing, and SR.4 will be set to indicate a

program failure. The internal WSM verify only detects errors for “1”s that do not successfully

program to “0”s. If a program error is detected, the Status Register should be cleared. Any time

SR.4 and/or SR.5 is set (e.g., a media failure occurs during a program or an erase), the device will

not accept any more Write to Buffer commands. Additionally, if the user attempts to program past

an erase block boundary with a Write to Buffer command, the device will abort the write to buffer

operation. This will generate an “Invalid Command/Sequence” error and SR.5 and SR.4 will be set.

Reliable buffered writes can only occur when VPEN = VPENH. If a buffered write is attempted

while VPEN ≤ VPENLK, SR.4 and SR.3 will be set. Buffered write attempts with invalid VCC and

VPEN voltages produce spurious results and should not be attempted. Finally, successful

programming requires that the corresponding block lock-bit be reset. If a buffered write is

attempted when the corresponding block lock-bit is set, SR.1 and SR.4 will be set.

11.3

Program Suspend

The Program Suspend command allows program interruption to read data in other flash memory

locations. Once the programming process starts (either by initiating a write to buffer or byte/word

program operation), writing the Program Suspend command requests that the WSM suspend the

program sequence at a predetermined point in the algorithm. The device continues to output SRD

when read after the Program Suspend command is written. Polling SR.7 can determine when the

programming operation has been suspended. When SR.7 = 1, SR.2 should also be set, indicating

that the device is in the program suspend mode. STS in level RY/BY# mode will also transition to

VOH. Specification tWHRH1 defines the program suspend latency.

At this point, a Read Array command can be written to read data from locations other than that

which is suspended. The only other valid commands while programming is suspended are Read

Query, Read Status Register, Clear Status Register, Configure, and Program Resume. After a

Program Resume command is written, the WSM will continue the programming process. SR.2 and

SR.7 will automatically clear and STS in RY/BY# mode will return to VOL. After the Program

Resume command is written, the device automatically outputs SRD when read. VPEN must remain

at VPENH and VCC must remain at valid VCC levels (the same VPEN and VCC levels used for

programming) while in program suspend mode. Refer to Figure 21, “Program Suspend/Resume

Flowchart” on page 62.

11.4

Program Resume

To resume (i.e., continue) a program suspend operation, execute the Program Resume command.

The Resume command can be written to any device address. When a program operation is nested

within an erase suspend operation and the Program Suspend command is issued, the device will

suspend the program operation. When the Resume command is issued, the device will resume and

complete the program operation. Once the nested program operation is completed, an additional

Resume command is required to complete the block erase operation. The device supports a

maximum suspend/resume of two nested routines. See Figure 21, “Program Suspend/Resume

Flowchart” on page 62).

JS28F128J3C120 Datasheet(PDF) 43 Page - Intel Corporation

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