PCM1716ESLASH2K datasheet(13/18 Pages) TI

13 / 18 page

PCM1716

APPLICATION

CONSIDERATIONS

DELAY TIME

There is a finite delay time in delta-sigma converters. In A/D

converters, this is commonly referred to as latency. For a

delta-sigma D/A converter, delay time is determined by the

order number of the FIR filter stage, and the chosen sampling

rate. The following equation expresses the delay time of

PCM1716:

TD = 30 x 1/fS

For fS = 44.1kHz, TD = 30/44.1kHz = 680µs

Applications using data from a disc or tape source, such as

CD audio, DVD audio, Video CD, DAT, Minidisc, etc.,

generally are not affected by delay time. For some profes-

sional applications such as broadcast audio for studios, it is

important for total delay time to be less than 2ms.

OUTPUT FILTERING

For testing purposes all dynamic tests are done on the

PCM1716 using a 20kHz low pass filter. This filter limits

the measured bandwidth for THD+N, etc. to 20kHz. Failure

to use such a filter will result in higher THD+N and lower

SNR and Dynamic Range readings than are found in the

specifications. The low pass filter removes out of band

noise. Although it is not audible, it may affect dynamic

specification numbers.

The performance of the internal low pass filter from DC to

40kHz is shown in Figure 12. The higher frequency roll-off

of the filter is shown in Figure 13. If the user’s application

has the PCM1716 driving a wideband amplifier, it is recom-

mended to use an external low pass filter.

BYPASSING POWER SUPPLIES

The power supplies should be bypassed as close as possible

to the unit. Refer to Figure 15 for optimal values of bypass

capacitors.

POWER SUPPLY

CONNECTIONS

PCM1716 has three power supply connections: digital (VDD),

and analog (VCC). Each connection also has a separate

ground. If the power supplies turn on at different times, there

is a possibility of a latch-up condition. To avoid this condi-

tion, it is recommended to have a common connection

between the digital and analog power supplies. If separate

supplies are used without a common connection, the delta

between the two supplies during ramp-up time must be less

than 0.1V.

An application circuit to avoid a latch-up condition is shown

in Figure 14.

FIGURE 12. Low Pass Filter Response.

100

10k

100k

0.5

–0.5

–1

Log Frequency (Hz)

FIGURE 13. Low Pass Filter Response.

100

10k

100k

10M

–20

–40

–60

–80

–100

Log Frequency (Hz)

FIGURE 14. Latch-Up Prevention Circuit.

DGND

AGND

Digital

Power Supply

Analog

Power Supply

Not Recommended For New Designs

PCM1716E/2K Datasheet(PDF) 13 Page - Texas Instruments

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