AD9920ABBCZ datasheet(39/112 Pages) AD

39 / 112 page

AD9920A

Rev. B | Page 39 of 112

XV1

XV2

XV23

VLENA

VLENB

VLENC

VLEND

V-PATTERN A

XV3

V-PATTERN B

V-PATTERN C

V-PATTERN D

NOTES

1. EACH SEGMENT MUST BE THE SAME LENGTH.

VLENA = VLENB = VLENC = VLEND.

Figure 47. Vertical Timing Divided into Four Segments: VPATA, VPATB, VPATC, and VPATD

COMBINED

V-PATTERN

NOTES

1. ABLE TO CONCATENATE PATTERNS TOGETHER ARBITRARILY.

2. EACH PATTERN CAN HAVE UP TO FOUR TOGGLES PROGRAMMED.

3. CAN CONCATENATE UP TO 18 PATTERNS INTO A MERGED PATTERN.

4. ODD AND EVEN LINES CAN HAVE A DIFFERENT PATTERN CONCATENATION

SPECIFIED BY VALTSEL EVEN AND ODD REGISTERS.

A B

DACC

B C B

DAB

Figure 48. Concatenating Each VPAT Group in an Arbitrary Order

NOTES

1. SIX V-PATTERN SEGMENTS CONCATENATED INTO A MERGED PATTERN.

2. COMMON AND REPETITIVE VTP SEGMENTS DERIVED FROM THE COMPLETE VTP PATTERN.

3. VALTSEL REGISTERS SPECIFY SEGMENT ORDER TO CREATE THE CONCATENATED MERGED PATTERN.

XV1

XV2

XV23

XV3

VPATA

VPATC

VPATB

VPATD

VPATA

VALTSEL0_EVEN

VALTSEL1_EVEN

SEGMENT 1

XV1 TO XV23

SEGMENT 2

SEGMENT 3

SEGMENT4

SEGMENT 5

SEGMENT 6

Figure 49. Example of Special V-Sequence Alternation Mode Using VALTSEL Registers to Specify Segment Order

AD9920ABBCZ Datasheet(PDF) 39 Page - Analog Devices

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