CS

LM5045

RAMP

CLK + LEB

CLK

Current

Sense

SLOPE

100 PA

0

CS

LM5045

RAMP

CLK + LEB

CLK

Current

Sense

SLOPE

100 PA

0

(a)

(b)

LM5045

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SNVS699G – FEBRUARY 2011 – REVISED MARCH 2013

Ramp Pin

The voltage at the RAMP pin provides the modulation ramp for the PWM comparator. The PWM comparator

compares the modulation ramp signal at the RAMP pin to the loop error signal to control the duty cycle. The

modulation ramp signal can be implemented either as a ramp proportional to the input voltage, known as feed-

forward voltage mode control, or as a ramp proportional to the primary current, known as current mode control.

The ability to configure the RAMP pin for either voltage mode or current mode allows the controller to be

implemented for the optimum control method depending upon the design constraints. Refer to the

APPLICATIONS INFORMATION section for more details on configuring the RAMP pin for feed-forward voltage

mode control and peak current mode control.

Slope Pin

For duty cycles greater than 50% (25% for each phase), peak current mode control is subject to sub-harmonic

oscillation. Sub-harmonic oscillation is normally characterized by observing alternating wide and narrow duty

cycles. This can be eliminated by adding an artificial ramp, known as slope compensation, to the modulating

signal at the RAMP pin. The SLOPE pin provides a current source ramping from 0 to 100

μA, at the frequency set

by the RT resistor, for slope compensation. The ramping current source at the SLOPE pin can be utilized in a

couple of different ways to add slope compensation to the RAMP signal:

1. As shown in Figure 13(a), the SLOPE and RAMP pins can be connected together through an appropriate

resistor to the CS pin. This configuration will inject current sense signal plus slope compensation to the

RAMP pin but CS pin will not see any slope compensation. Therefore, in this scheme slope compensation

will not affect the current limit.

2. In a second configuration, as shown in Figure 13(b), the SLOPE, RAMP and CS pins can be tied together. In

this configuration the ramping current source from the SLOPE pin will flow through the filter resistor and filter

capacitor, therefore both the CS pin and the RAMP pin will see the current sense signal plus the slope

compensation ramp. In this scheme, the current limit is compensated by the slope compensation and the

current limit onset point will vary.

If the slope compensation is not required for e.g. in feed-forward voltage mode control, the SLOPE pin must be

connected to the AGND pin. When the RT pin is synched to an external clock, it is recommended to disable the

SLOPE pin and add slope compensation externally by connecting an appropriate resistor from the VCC pin to the

CS pin. Please refer to the APPLICATIONS INFORMATION section for more details.

A.

Slope Compensation Configured for PWM Only (No Current Limit Slope)

B.

Slope Compensation Configured for PWM and Current Limit

Figure 13. Slope Compensation Configuration

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