RD(1,2) =

T(1,2)

3 pF

; For 20k < (1,2) < 100k

CLK

HO1,LO2

HO2,LO1

Tonmax

T1

Tosc

T1

1

T1 D RD1

LM5045

www.ti.com

SNVS699G – FEBRUARY 2011 – REVISED MARCH 2013

Figure 14. Timing Diagram Illustrating the Maximum Duty Cycle and Dead-Time Set by RD1

Synchronous Rectifier Control Outputs (SR1 & SR2)

Synchronous rectification (SR) of the transformer secondary provides higher efficiency, especially for low output

voltage converters, compared to the diode rectification. The reduction of rectifier forward voltage drop (0.5V -

1.5V) to 10mV - 200mV VDS voltage for a MOSFET significantly reduces rectification losses. In a typical

application, the transformer secondary winding is center tapped, with the output power inductor in series with the

center tap. The SR MOSFETs provide the ground path for the energized secondary winding and the inductor

current. From Figure 15 it can be seen that when the HO1/LO2 diagonal is turned ON, power transfer is enabled

from the primary. During this period, the SR1 MOSFET is enabled and the SR2 MOSFET is turned-off. The

secondary winding connected to the SR2 MOSFET drain is twice the voltage of the center tap at this time. At the

conclusion of the HO1/LO2 pulse, the inductor current continues to flow through the SR2 MOSFET body diode.

Since the body diode causes more loss than the SR MOSFET, efficiency can be improved by minimizing the T2

period while maintaining sufficient timing margin over all conditions (component tolerances, etc.) to prevent the

shoot-through current. When HO2/LO1 enables power transfer from the primary, the SR2 MOSFET is enabled

and the SR1 MOSFET is off.

During the freewheeling period, the inductor current is almost equally shared between both the SR1 and SR2

MOSFETs which effectively shorts the transformer secondary. The SR2 MOSFET is disabled before HO1/LO2 is

turned-on. The SR2 MOSFET body diode continues to carry about the half inductor current until the primary

power raises the SR2 MOSFET drain voltage and reverse biases the body diode. Ideally, dead-time T1 would be

set to the minimum time that allows the SR MOSFET to turn off before the SR MOSFET body diode starts

conducting.

The SR drivers are powered by the REF regulator and each SR output is capable of sourcing 0.1A and sinking

0.4A peak. The amplitude of the SR drivers is limited to 5V. The 5V SR signals enable the LM5045 to transfer

SR control across the isolation barrier either through a solid-state isolator or a pulse transformer. The actual gate

sourcing and sinking currents for the synchronous MOSFETs are provided by the secondary-side bias and gate

drivers.

T1 and T2 can be programmed by connecting a resistor between RD1 and RD2 pins and AGND. It should be

noted that while RD1 effects the maximum duty cycle, RD2 does not. The RD1 and RD2 resistors should be

located very close to the device. The formula for RD1 and RD2 resistors are given below:

(3)

If the desired dead-time for T1 is 60ns, then the RD1 will be 20 k

Ω.

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