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AS5013

Datasheet - Detailed Descr i p ti on

7.5.2 I²C Electrical Specification

Standard-mode, Fast-mode, High Speed-mode

Notes:

2. Input filters on the SDA and SCL inputs suppress noise spikes of less than 50ns in Fast-mode and 10ns in HS-mode.

3. I/O pins of Fast-mode and Fast-mode plus devices must not obstruct the SDA and SCL lines if VDDp is switched off.

7.5.3 I²C Timing

Symbol

Parameter

Condition

Min

Max

Unit

LOW-level input voltage

-0.5

0.3VDDp

V

HIGH-level input voltage

0.7VDDp

VDDp + 0.5

(see note 1)

V

Hysteresis of Schmitt Trigger inputs

VDDp < 2V

0.1VDDp

V

LOW-level output voltage (open-drain or

open-collector) at 3mA sink current

VDDp < 2V

-

0.2VDDp

V

LOW-level output current

-

-

mA

Pull-up current of SCLH current source

SCLH output levels between

0.3VDDp and 0.7VDDp

312

mA

Pulse width of spikes that must be

suppressed by the input filter

In HS-mode

-

10

(see note 2)

ns

In Fast-mode

50

(see note 2)

ns

Input current at each I/O Pin

Input voltage

between 0.1VDDp and 0.9VDDp

10

(see note 3)

µA

Total capacitive load for each bus line

-

400

pF

I/O capacitance (SDA, SCL)

-10

pF

Symbol

Parameter

Condition

Fast-mode

HS-mode

1

Unit

Min

Max

Min

Max

Min

Max

SCL clock Frequency

-

400

-

3400

-

1700

kHz

Bus Free Time; time

between STOP and

START Condition

500

-

500

-

500

-

ns

Hold Time; (Repeated)

START Condition

2

600

-

160

-

160

-

ns

LOW Period of SCL Clock

1300

-

160

-

320

-

ns

HIGH Period of SCL Clock

600

-

60

-

120

-

ns

Setup Time for a

Repeated START

condition

600

-

160

-

160

-

ns

Data Hold Time

3

0

900

0

70

0

150

ns

Data Setup Time

4

100

-

10

-

10

-

ns

Rise time of SCLH signal

External pull-up

source of 3mA

-

-

10

40

20

80

ns