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AM79C974 Datasheet(PDF) 32 Page - Advanced Micro Devices

Part # AM79C974
Description  PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems
PDF  153 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C974 Datasheet(HTML) 32 Page - Advanced Micro Devices

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AMD
P R E L I M I N A R Y
32
Am79C974
Bus Master DMA Transfers
There are four primary types of DMA transfers. The
Am79C974 controller uses non-burst as well as burst
cycles for read and write access to the main memory.
Basic Non-Burst Read Cycles
All Am79C974 controller non-burst read accesses are of
the PCI command type Memory Read (type 6). Note that
during all non-burst read operations, the Am79C974
controller will always activate all byte enables, even
though some byte lanes may not contain valid data as
indicated by a buffer pointer value. In such instances,
the Am79C974 controller will internally discard un-
needed bytes.
Figure 6 shows a typical non-burst read access. The
Am79C974 controller asserts
IRDY at clock 5 immedi-
ately after the address phase and starts sampling
DEVSEL. The target extends the cycle by asserting
DEVSEL not until clock 6. Additionally, the target inserts
one wait state by asserting its ready (
TRDY) at clock 8.
18681A-10
FRAME
CLK
AD
IRDY
TRDY
C/
BE
DEVSEL
REQ
GNT
12345678
0000
9
PAR
PAR
PAR
DATA
DEVSEL is sampled by the Am79C974 controller.
ADDR
0110
Figure 6. Non-Burst Read Cycles With Wait States



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