AM79C974 datasheet(95/153 Pages) AMD

95 / 153 page

P R E L I M I N A R Y

AMD

Am79C974

AC SWITCHING CHARACTERISTICS over operating range unless otherwise specified

PCI Bus Interface and Board Interface

Parameter

Symbol

Parameter Description

Test Conditions

Min

Max

Unit

Clock Timing

CLK Frequency

MHz

tCYC

CLK Period

@ 1.5 V

∞

tHIGH

CLK High Time

@ 2.0 V

tLOW

CLK Low Time

@ 0.8 V

tFALL

CLK Fall Time

over 2 V p-p

V/ns

tRISE

CLK Rise Time

over 2 V p-p

V/ns

Output and Float Delay Timing

tVAL

AD[31:00], C/

BE[3:0], PAR,

FRAME, IRDY, TRDY, STOP,

LOCK, DEVSEL, PERR, SERR

Valid Delay

tVAL (REQ)

REQ Valid Delay

fEESK

EESK Frequency

(See note below)

650

KHz

tVAL (EEDI)

EEDI Valid Output Delay from EESK

(See note below)

100

400

tVAL (EESK) EECS Valid Output Delay from EESK

(See note below)

400

tON

AD[31:00], C/

BE[3:0], PAR, FRAME,

IRDY, TRDY, STOP, LOCK, DEVSEL

Active Delay

tOFF

AD[31:00], C/

BE[3:0], PAR, FRAME,28

IRDY, TRDY, STOP, LOCK, DEVSEL

Float Delay

Setup and Hold Timing

tSU

AD[31:00], C/

BE[3:0], PAR, FRAME,7

IRDY, TRDY, STOP, LOCK, DEVSEL,

IDSEL

Setup Time

AD[31:00], C/

BE[3:0], PAR, FRAME,0

IRDY, TRDY, STOP, LOCK, DEVSEL,

IDSEL

Hold Time

tSU (GNT)

GNT Setup Time

tH (GNT)

GNT Hold Time

tSU (EEDO)

EEDO Setup Time to EESK

(See note below)

tH (EEDO)

EEDO Hold Time from EESK

(See note below)

Note:

Parameter value is given for automatic EEPROM read operation. When EEPROM port (BCR19) is used to access the EEPROM,

software is responsible for meeting EEPROM timing requirements.

AM79C974 Datasheet(PDF) 95 Page - Advanced Micro Devices

AM79C974 Datasheet(HTML) 95 Page - Advanced Micro Devices

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