TLC2652, TLC2652A, TLC2652Y

Advanced LinCMOS PRECISION CHOPPERSTABILIZED

OPERATIONAL AMPLIFIERS

SLOS019E − SEPTEMBER 1988 − REVISED FEBRUARY 2005

23

POST OFFICE BOX 655303

APPLICATION INFORMATION

latch-up avoidance

Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC2652 inputs

and output are designed to withstand −100-mA surge currents without sustaining latch-up; however, techniques

to reduce the chance of latch-up should be used whenever possible. Internal protection diodes should not, by

design, be forward biased. Applied input and output voltages should not exceed the supply voltage by more than

300 mV. Care should be exercised when using capacitive coupling on pulse generators. Supply transients

should be shunted by the use of decoupling capacitors (0.1

µF typical) located across the supply rails as close

to the device as possible.

The current path established if latch-up occurs is usually between the supply rails and is limited only by the

impedance of the power supply and the forward resistance of the parasitic thyristor. The chance of latch-up

occurring increases with increasing temperature and supply voltage.

electrostatic discharge protection

The TLC2652 incorporates internal ESD-protection circuits that prevent functional failures at voltages at or

below 2000 V. Care should be exercised in handling these devices, as exposure to ESD may result in

degradation of the device parametric performance.

theory of operation

Chopper-stabilized operational amplifiers offer the best dc performance of any monolithic operational amplifier.

This superior performance is the result of using two operational amplifiers, a main amplifier and a nulling

amplifier, plus oscillator-controlled logic and two external capacitors to create a system that behaves as a single

amplifier. With this approach, the TLC2652 achieves submicrovolt input offset voltage, submicrovolt noise

voltage, and offset voltage variations with temperature in the nV/

°C range.

The TLC2652 on-chip control logic produces two dominant clock phases: a nulling phase and an amplifying

phase. The term chopper-stabilized derives from the process of switching between these two clock phases.

Figure 34 shows a simplified block diagram of the TLC2652. Switches A and B are make-before-break types.

During the nulling phase, switch A is closed shorting the nulling amplifier inputs together and allowing the nulling

amplifier to reduce its own input offset voltage by feeding its output signal back to an inverting input node.

remain nulled during the amplifying phase.

Null

Amplifier

IN +

IN −

Main Amplifier

VO

VDD −

CXA

CXB

B

A

B

A

+

+

−

−

Figure 34. TLC2652 Simplified Block Diagram