COM20020ILJP datasheet(26/72 Pages) MICROCHIP

26 / 72 page

5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM

Datasheet

Revision 12-05-06

Page 26

SMSC COM20020I Rev D

DATASHEET

Chapter 6

Functional Description

6.1

Microsequencer

The COM20020ID contains an internal microsequencer which performs all of the control operations

necessary to carry out the ARCNET protocol. It consists of a clock generator, a 544 x 8 ROM, a program

counter, two instruction registers, an instruction decoder, a no-op generator, jump logic, and

reconfiguration logic.

The COM20020ID derives a 10 MHz and a 5 MHz clock from the output clock of the Clock Multiplier.

These clocks provide the rate at which the instructions are executed within the COM20020ID. The 10

MHz clock is the rate at which the program counter operates, while the 5 MHz clock is the rate at which the

instructions are executed. The microprogram is stored in the ROM and the instructions are fetched and

then placed into the instruction registers.

One register holds the opcode, while the other holds the

immediate data. Once the instruction is fetched, it is decoded by the internal instruction decoder, at which

point the COM20020ID proceeds to execute the instruction. When a no-op instruction is encountered, the

microsequencer enters a timed loop and the program counter is temporarily stopped until the loop is

complete. When a jump instruction is encountered, the program counter is loaded with the jump address

from the ROM.

The COM20020ID contains an internal reconfiguration timer which interrupts the

microsequencer if it has timed out. At this point the program counter is cleared and the MYRECON bit of

the Diagnostic Status Register is set.

Table 6.1 - Read Register Summary

MSB

READ

LSB

ADDR

STATUS

RI/TRI

X/RI

X/TA

POR

TEST

RECON

TMA

TA/

TTA

DIAG.

STATUS

MY-

RECON

DUPID

RCV-

ACT

TOKEN

EXC-

NAK

TENTID

NEW

NEXTID

ADDRESS

PTR HIGH

RD-

DATA

AUTO-

INC

A10

ADDRESS

PTR LOW

DATA

SUB ADR

(R/W)

Note 6.1

(R/W)

Note 6.1

SUB-

AD2

SUB-

AD1

SUB-

AD0

CONFIG-

URATION

RESET

CCHEN

TXEN

ET1

ET2

BACK-

PLANE

SUB-

AD1

SUB-

AD0

TENTID

TID7

TID6

TID5

TID4

TID3

TID2

TID1

TID0

07-0

NODE ID

NID7

NID6

NID5

NID4

NID3

NID2

NID1

NID0

07-1

SETUP1

MODE

FOUR

NAKS

RCV-

ALL

CKP3

CKP2

CKP1

SLOW-

ARB

07-2

NEXT ID

NXT

ID7

NXT

ID6

NXT

ID5

NXT

ID4

NXT

ID3

NXT

ID2

NXT

ID1

NXT

ID0

07-3

SETUP2

RBUS-

TMG

CKUP1

CKUP0

NO-

SYNC

RCN-

TM1

RCM-

TM2

07-4

COM20020ILJP Datasheet(PDF) 26 Page - Microchip Technology

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