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THS4524MDBTREP Datasheet(PDF) 38 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part # THS4524MDBTREP
Description  VERY LOW POWER, NEGATIVE RAIL INPUT, RAIL-TO-RAIL OUTPUT,FULLY DIFFERENTIAL AMPLIFIER
PDF  48 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

THS4524MDBTREP Datasheet(HTML) 38 Page - National Semiconductor (TI)

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TP2
TP3
C
3
0.1 F
m
C603
C0805
C
5
0.1 F
m
C
8
10 F
m
C
7
10 F
m
V
S-
J4
V
S-
C
12
0.1 F
m
C603
C0805
C
11
0.1 F
m
C
9
10 F
m
C
10
10 F
m
V
S+
V
S+
J8
V
S+
C
15
Open
C
16
Open
C
13
Open
C
14
Open
V
S-
J5
GND
R
1
R
2
R
12
1kW
R
13
1kW
R
14
1kW
R
15
1kW
R
25
0W
J9
J10
R
26
R
16
487W
R
20
52.3W
R
17
487W
R
22
2
1
3
5
6
4
R
21
R
7
5
4
6
2
3
1
R
3
R
4
0W
R
6
49.9W
C
1
0.22 F
m
R
8
C
2
C
4
0.22 F
m
V
S-
V
S-
V
S+
R
23
R
18
R
24
0W
R
9
R
5
0W
R
10
52.3W
R
11
52.3W
J6
R
19
J7
J1
J2
T2
T1
TP1
V
OUT+
V
OUT-
4
5
6
3
1
8
7
2
PW
CM
J11
JP1
J3
C
6
0.22 F
m
THS4524-EP
SBOS609A – JUNE 2012 – REVISED AUGUST 2013
www.ti.com
EVM AND LAYOUT RECOMMENDATIONS
Figure 88 shows the THS4524EVM schematic. PCB layers 1 through 4 are shown in Figure 89; Table 8 lists the
bill of materials for the THS4524EVM as supplied from TI. It is recommended to follow the layout of the external
components near to the amplifier, ground plane construction, and power routing as closely as possible. Follow
these general guidelines:
1. Signal routing should be direct and as short as possible into and out of the op amp circuit.
2. The feedback path should be short and direct.
3. Ground or power planes should be removed from directly under the amplifier input and output pins.
4. An output resistor is recommended in each output lead, placed as near to the output pins as possible.
5. Two 0.1-
μF power-supply decoupling capacitors should be placed as near to the power-supply pins as
possible.
6. Two 10-
μF power-supply decoupling capacitors should be placed within 1 inch of the device and can be
shared among multple analog devices.
7. A 0.22-
μF capacitor should be placed between the VOCM input pin and ground near to the pin. This capacitor
limits noise coupled into the pin.
8. The PD pin uses TTL logic levels; a bypass capacitor is not necessary if actively driven, but can be used for
robustness in noisy environments whether driven or not.
9. If input termination resistors R10 and R11 are used, a single point connection to ground on L2 is
recommended.
Figure 88. THS4524EVM: Schematic
38
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Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links :THS4524-EP



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