On-chip voltage regulator (VREG)

AN2871

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Doc ID 15304 Rev 3

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On-chip voltage regulator (VREG)

The SPC560Pxx device can be supplied with 5 V ±10% or 3.3 V ± 10 % (4.5 – 5.5 V or

3.0 – 3.6 V, respectively) to suit different applications. Additionally, the on-chip linear voltage

regulator generates a reference voltage enabling the regulation of the 1.2 V via an external

ballast transistor (with a specified tolerance 1.15 – 1.32 V) from the external 3.3 V/5 V

The on-chip voltage regulator module provides the following features:

●

Uses external NPN (Negative-Positive-Negative) transistor

●

Regulates external 3.3 V–5.0 V down to 1.2 V for the core logic

●

Low voltage detection on the internal 1.2 V and I/O voltage 3.3 V

2.1

VREG design guideline

2.1.1

Voltage regulator

The on-chip voltage regulator module regulates the external 3.3 V–5.0 V supply down to

1.2 V for the core logic. The nominal target output is 1.2 V. Due to variations the actual

output will be in the range of 1.15–1.32 V in the full current load range (0–200 mA) after

factory trimming.

The internal voltage regulator requires an external NPN ballast transistor, approved

transistor list available in Table 1, to be connected as shown in Figure 1 for SPC560P40xx,

SPC560P60xx/SPC56AP60xx and Figure 2 for SPC560P50xx. Capacitances, CDEC1,

CDEC2,CDEC3, should be placed on the board as near as possible to the associated pins.

Care should also be taken to limit the serial inductance of the board to less than LREG as

described in the device datasheet.

The device cannot be used with an external 1.2 V supply. Always use the external ballast

transistor to generate the 1.2 V supply to the core.