10F202 datasheet(64/88 Pages) MICROCHIP

64 / 88 page

PIC10F200/202/204/206

DS40001239F-page 64

 2004-2014 Microchip Technology Inc.

FIGURE 12-3:

RESET, WATCHDOG TIMER AND DEVICE RESET TIMER TIMING –

PIC10F200/202/204/206

TABLE 12-3:

CALIBRATED INTERNAL RC FREQUENCIES – PIC10F200/202/204/206

AC CHARACTERISTICS

Standard Operating Conditions (unless otherwise specified)

Operating Temperature

-40

C  TA  +85C (industrial),

-40

C  TA  +125C (extended)

Operating Voltage VDD range is described in

Section 12.1 “DC Characteristics: PIC10F200/202/204/206

(Industrial)”

Param.

No.

Sym.

Characteristic

Freq.

Tolerance

Min. Typ.† Max. Units

Conditions

F10

FOSC Internal Calibrated

INTOSC Frequency(1,2)

1%

3.96

4.00

4.04

MHz

VDD=3.5V @ 25

C

2%

3.92

4.00

4.08

MHz

2.5V

VDD  5.5V

C  TA  +85C (industrial)

5%

3.80

4.00

4.20

MHz

2.0V

VDD  5.5V

-40

C  TA  +85C (industrial)

-40

C  TA  +125C (extended)

These parameters are characterized but not tested.

† Data in the Typical (“Typ.”) column is at 5V, 25

C unless otherwise stated. These parameters are for

design guidance only and are not tested.

Note 1:

To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to

the device as possible. 0.1

F and 0.01 F values in parallel are recommended.

Under stable VDD conditions.

VDD

MCLR

Internal

POR

DRT

Timeout(2)

Internal

Reset

Watchdog

Timer

Reset

I/O pin(1)

Note

I/O pins must be taken out of High-Impedance mode by enabling the output drivers in software.

Runs on POR only.

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