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10F202 Datasheet(PDF) 12 Page - Microchip Technology

Part # 10F202
Description  6-Pin, 8-Bit Flash Microcontrollers
PDF  88 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

10F202 Datasheet(HTML) 12 Page - Microchip Technology

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PIC10F200/202/204/206
DS40001239F-page 12
 2004-2014 Microchip Technology Inc.
4.2
Program Memory Organization for
the PIC10F202/206
The PIC10F202/206 devices have a 10-bit Program
Counter (PC) capable of addressing a 1024 x 12
program memory space.
Only the first 512 x 12 (0000h-01FFh) for the
PIC10F202/206 are physically implemented (see
Figure 4-2). Accessing a location above these
boundaries will cause a wraparound within the first
512 x 12 space (PIC10F202/206). The effective
Reset vector is at 0000h (see Figure 4-2). Location
01FFh (PIC10F202/206) contains the internal clock
oscillator calibration value. This value should never
be overwritten.
FIGURE 4-2:
PROGRAM MEMORY MAP
AND STACK FOR THE
PIC10F202/206
4.3
Data Memory Organization
Data memory is composed of registers or bytes of
RAM. Therefore, data memory for a device is specified
by its register file. The register file is divided into two
functional groups: Special Function Registers (SFR)
and General Purpose Registers (GPR).
The Special Function Registers include the TMR0
register, the Program Counter (PCL), the STATUS
register, the I/O register (GPIO) and the File Select
Register (FSR). In addition, Special Function Registers
are used to control the I/O port configuration and
prescaler options.
The General Purpose registers are used for data and
control information under command of the instructions.
For the PIC10F200/204, the register file is composed of
seven Special Function registers and 16 General
Purpose registers (see Figure 4-3 and Figure 4-4).
For the PIC10F202/206, the register file is composed of
eight Special Function registers and 24 General
Purpose registers (see Figure 4-4).
4.3.1
GENERAL PURPOSE REGISTER
FILE
The General Purpose Register file is accessed, either
directly or indirectly, through the File Select Register
(FSR). See Section 4.9 “Indirect Data Addressing:
INDF and FSR Registers”.
CALL, RETLW
PC<8:0>
Stack Level 1
Stack Level 2
10
0000h
02FFh
Reset Vector(1)
Note
1:
Address 0000h becomes the
effective Reset vector. Location
01FFh contains the MOVLW XX
internal oscillator calibration value.
512 Words
01FFh
0200h
On-chip Program
Memory



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