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AN3245 Datasheet(PDF) 17 Page - STMicroelectronics |
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AN3245 Datasheet(HTML) 17 Page - STMicroelectronics |
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17 / 19 page ![]() AN3245 Software Doc ID 17747 Rev 1 17/19 2.2.4 Key lock with combination keys STMPE1801 provides key lock features when a combination key is defined. Without a programmed combination key, this feature is not active. Once activated all subsequent key presses are ignored. Key lock remains until a combination keys press is detected. Key lock is enabled when: 1. Bit[1] of the KPC_CMD register is written '1' and 2. All keys are released. Read back of '1' at bit [1] of the KPC_CMD register only means that the key lock command is active. It doesn't mean that the device has already entered into key lock mode. Read back of '0' at bit [1] of the KPC_CMD register means that the key lock command is not active or the device has exited from key lock mode. 2.3 Hotkey de-bounce It is possible that a signal from a mechanical connector (e.g. a 3.5 mm earphone jack) is connected to the STMPE1801 input as a hotkey input. In such a case, excessive noise is expected from the hotkey input due to the mechanical movement. STMPE1801 provides a programmable hotkey de-bounce ranging from 30 µs to 210 µs (SYS_CTRL Register 0x02). If this is not sufficient, it is also possible to connect the noise input to one of the 4 dedicated keys (GPIO_0, GPIO_1, GPIO_2, and GPIO_3 pins) to which de-bounce can be programmed from 10 ms to 127 ms (KPC_CTRL_MID Register 0x34). If the above de-bounce is still not sufficient, the host can implement the filtering or de- bouncing by polling the status bit in the interrupt status register (0x09). 2.4 Power modes transition Table 3 highlights the states of keypad FIFO, GPIO, Interrupt, and PWM during the various power modes: – Operational mode – Hibernation mode – Reset Table 3. Power modes vs. GPIO/Keypad/Interrupt data Operational mode Hibernation mode Reset (HW, SW, POR, general call) Keypad configuration and FIFO data Active Sustained (FIFO is read and cleared prior to entering hibernation mode) Cleared GPIO configuration, pin state, and data Active Sustained Cleared Interrupt configuration and data Active Sustained Cleared |
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