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AN2507 Datasheet(PDF) 22 Page - STMicroelectronics

Part # AN2507
Description  This application note explains the design of a FLASH LED driver using the STCF03 device
PDF  31 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN2507 Datasheet(HTML) 22 Page - STMicroelectronics

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Reading and writing to the STCF03 registers through the I2C bus
AN2507
22/31
7
Reading and writing to the STCF03 registers through
the I2C bus
7.1
Writing to a single register
Writing to a single register starts with a START-bit followed by the 7-bit device address of
STCF03. The 8-th bit is the R/W bit, which is 0 in this case. R/W = 1 means a Reading
operation. Then the master awaits an acknowledgement from STCF03. The 8-bit address of
the desired register is sent afterwards to STCF03. It will also be followed by an acknowledge
pulse. The last transmitted byte is the data that is going to be written into the register. It is
followed again by an acknowledge pulse from STCF03. Then the master generates a STOP-
bit and the communication is over. See Figure 17 below.
Figure 17.
Writing to a single register
7.2
Writing to multiple registers with incremental addressing
It would be unpractical to send several times the device address and the address of the
register when writing to multiple registers. STCF03 supports writing to multiple registers with
incremental addressing. When data is written to a register, the register address is
automatically incremented (by one), and therefore the next data can be sent without sending
again the device address and the register address. See Figure 18 below.
Figure 18.
Writing to multiple registers
S
T
A
R
T
DEVICE
ADDRESS
7 bits
A
C
K
W
R
I
T
E
M
S
B
L
S
B
R
/
W
A
C
K
ADDRESS OF
REGISTER
DATA
A
C
K
A
C
K
S
T
O
P
M
S
B
M
S
B
L
S
B
L
S
B
SDA LINE
S
T
A
R
T
DEVICE
ADDRESS
7 bits
A
C
K
W
R
I
T
E
M
S
B
L
S
B
R
/
W
A
C
K
ADDRESS OF
REGISTER i
DATA i
A
C
K
A
C
K
S
T
O
P
M
S
B
M
S
B
L
S
B
L
S
B
DATA i+1
A
C
K
L
S
B
DATA i+2
A
C
K
L
S
B
DATA i+2
L
S
B
DATA i+n
A
C
K
M
S
B
M
S
B
M
S
B
M
S
B
M
S
B
A
C
K
L
S
B
SDA LINE



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