AN4350 datasheet(6/34 Pages) STMICROELECTRONICS

6 / 34 page

Circuit description and design guidelines

AN4350

6/34

DocID025181 Rev 1

A small offset on the CS is still useful to keep a good THD and so it can be added using

a resistor from the VCC pin instead of a partitioning from the input voltage resulting in

a reduction of the dissipated power and the component count/size.

The VOUT output voltage is regulated through the CV loops and it has to be designed in

order to have system bandwidth much lower than current loop bandwidth (voltage loop BW

<< 100 Hz - 120 Hz); the current loop is instead used to set the maximum deliverable

current IOUTCC.

The design can be set defining an equivalent current sense resistor according to the

standard HVLED815PF equation for the output current setting:

Equation 1

where n is the transformer ratio between the primary (NP) and secondary side (NS), VCLED

is the internal equivalent reference voltage (VCLED = 0.2 V). See the HVLED815PF

datasheet for more details.

2.2

Transformer selection

The main parameters of the flyback transformer (LP, NP, NS, NAUX, LLK) have to be designed

in order to sustain the desiderated output voltage (VOUT), the maximum output power

(POUT), the device supply (VCC) and the desiderated reflected voltage on the primary side

(VR).

The transformer magnetization inductance (LP) is selected as a trade-off between the

maximum switching frequency (internally limited up to 166 kHz) and the maximum output

power, in according to Equation 2:

Equation 2

where IP is the primary peak current and it can be estimated using Equation 3:

Equation 3

The ratio between the primary (NP) and secondary (NS) winding can be selected to reach

the desiderated reflected voltage (VR), using Equation 4:

Equation 4

where VR is the desiderated reflected voltage, VD the forward voltage of the output diode.

RSENSE EQ

---

VCLED

IOUT

-------------------



LPMAX

VinMIN

------------------





----------------------------------

FswMIN

---------------------



------------------



IP Vin Iout





Iout

MAX

-------









 VIN

MIN



-----------------------------







-------

VOUT VD

----------------------------

VOUT

--------------



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