ZL6105

9

FN6906.5

December 19, 2013

UVLO Delay

–

2.5

-

µs

Factory default

–

90

–

Factory default

–

5

–

%

Power Good Delay

Using pin-strap or resistor (Note 16)

0

–

200

ms

0

–

500

s

VSEN Undervoltage Threshold

Factory default

–

85

–

0

–

110

VSEN Overvoltage Threshold

Factory default

–

115

–

0

–

115

VSEN Undervoltage Hysteresis

–

5

–

VSEN Undervoltage/Overvoltage

Fault Response Time

Factory default

–

16

–

µs

5

–

60

µs

Current Limit Set-point Accuracy

–

±10

–

% FS

(Note 17)

Current Limit Set-point Accuracy

(Ground Referenced)

–

±10

–

% FS

(Note 17)

Current Limit Protection Delay

Factory default

–

10

–

(Note 18)

1

–

32

(Note 18)

Temperature Compensation of

Current Limit Protection Threshold

Factory default

4400

ppm/°C

100

12700

Thermal Protection Threshold

(Junction Temperature)

Factory default

–

125

–

°C

-40

–

125

°C

Thermal Protection Hysteresis

–

15

–

°C

NOTES:

12. Does not include margin limits.

13. Percentage of Full Scale (FS) with temperature compensation applied.

15. The device requires a minimum delay period following an enable signal and prior to ramping its output as described in “Soft-Start Delay and Ramp

Times” on page 14.

16. Factory default Power Good delay is set to the same value as the soft-start ramp time. Refer to “Soft-Start Delay and Ramp Times” on page 14 for

further restrictions on PG Delay.

17. Percentage of Full Scale (FS) with temperature compensation applied

19. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.

20. Nominal capacitance of logic pins is 5pF.

the operating temperature range, -40°C to +85°C. (Continued)

PARAMETER

CONDITIONS

MIN

(Note 19)

TYP

MAX

(Note 19)

UNIT