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ZL6105ALAF Datasheet(PDF) 16 Page - Intersil Corporation

Part # ZL6105ALAF
Description  Digital DC/DC Controller with Drivers and Auto Compensation
PDF  35 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ZL6105ALAF Datasheet(HTML) 16 Page - Intersil Corporation

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ZL6105
16
FN6906.5
December 19, 2013
The switching frequency can also be set to any value between
200kHz and 1.33MHz using the I2C/SMBus interface. The available
frequencies below 1.4MHz are defined by fSW = 8MHz/N, where the
whole number N is 6
≤ N ≤ 40. See Application Note AN2033 for
details.
If a value other than fSW = 8MHz/N is entered using a PMBus
command, the internal circuitry will select the valid switching
frequency value that is closest to the entered value. For example,
if 810kHz is entered, the device will select 800kHz (N = 10).
When multiple Zilker Labs devices are used together, connecting
the SYNC pins together will force all devices to synchronize with
each other. The CFG1 pin of one device must set its SYNC pin as
an output and the remaining devices must have their SYNC pins
set as Auto Detect.
Note: The switching frequency read back using the appropriate
PMBus command will differ slightly from the selected values in
Table 11. The difference is due to hardware quantization.
Power Train Component Selection
The ZL6105 is a synchronous buck converter that uses external
MOSFETs, inductor and capacitors to perform the power
conversion process. The proper selection of the external
components is critical for optimized performance.
To select the appropriate external components for the desired
performance goals, the power supply requirements listed in
Table 12 must be known.
DESIGN GOAL TRADE-OFFS
The design of the buck power stage requires several
compromises among size, efficiency, and cost. The inductor core
loss increases with frequency, so there is a trade-off between a
small output filter made possible by a higher switching frequency
and getting better power supply efficiency. Size can be decreased
ZL
Logic
high
SYNC
200 kHz – 1.33MHz
ZL
SYNC
200kHz – 1.4MHz
ZL
N/C
SYNC
200kHz – 1.4MHz
A) SYNC = output
B) SYNC = input
ZL
N/C
SYNC
ZL
RSYNC
N/C
SYNC
Logic
high
Logic
low
Open
C) SYNC = Auto Detect
OR
OR
FIGURE 10. SYNC PIN CONFIGURATIONS
TABLE 11. SWITCHING FREQUENCY RESISTOR SETTINGS
RSYNC
(k
Ω)
fSW
(kHz)
RSYNC
(k
Ω)
fSW
(kHz)
10
200
26.1
533
11
222
28.7
571
12.1
242
31.6
615
13.3
267
34.8
727
14.7
296
38.3
800
16.2
320
46.4
889
17.8
364
51.1
1000
19.6
400
56.2
1143
21.5
421
68.1
1333
23.7
471
TABLE 12. POWER SUPPLY REQUIREMENTS
PARAMETER
RANGE
EXAMPLE
VALUE
Input Voltage (VIN)
3V to 14V
12V
Output Voltage (VOUT)
0.6V to 5.0V
1.2V
Output Current (IOUT)
0A to ~25A
20A
Output Voltage Ripple
(VORIP)
<3% of VOUT
1% of VOUT
Output Load Step (IOSTEP)<IO
50% of IO
Output Load Step Rate
-
10A/µs
Output Deviation Due to Load Step
-
±50mV
Maximum PCB Temp.
+120°C
+85°C
Desired Efficiency
-
85%
Other Considerations
Various
Optimize for
small size



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