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PIC18LC658 Datasheet(PDF) 36 Page - Microchip Technology |
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PIC18LC658 Datasheet(HTML) 36 Page - Microchip Technology |
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36 / 366 page  PIC18CXX8 DS30475A-page 36 Advanced Information 2000 Microchip Technology Inc. ADRESH 658 858 xxxx xxxx uuuu uuuu uuuu uuuu ADRESL 658 858 xxxx xxxx uuuu uuuu uuuu uuuu ADCON0 658 858 --00 0000 --00 0000 --uu uuuu ADCON1 658 858 --00 0000 --00 0000 --uu uuuu ADCON2 658 858 0--- -000 0--- -000 u--- -uuu CCPR1H 658 858 xxxx xxxx uuuu uuuu uuuu uuuu CCPR1L 658 858 xxxx xxxx uuuu uuuu uuuu uuuu CCP1CON 658 858 --00 0000 --00 0000 --uu uuuu CCPR2H 658 858 xxxx xxxx uuuu uuuu uuuu uuuu CCPR2L 658 858 xxxx xxxx uuuu uuuu uuuu uuuu CCP2CON 658 858 --00 0000 --00 0000 --uu uuuu CVRCON 658 858 0000 0000 0000 0000 uuuu uuuu CMCON 658 858 0000 0000 0000 0000 uuuu uuuu TMR3H 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TMR3L 658 858 xxxx xxxx uuuu uuuu uuuu uuuu T3CON 658 858 0000 0000 uuuu uuuu uuuu uuuu PSPCON 658 858 0000 ---- 0000 ---- uuuu ---- SPBRG 658 858 xxxx xxxx uuuu uuuu uuuu uuuu RCREG 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXREG 658 858 xxxx xxxx uuuu uuuu uuuu uuuu TXSTA 658 858 0000 -01x 0000 -01u uuuu -uuu RCSTA 658 858 0000 000x 0000 000u uuuu uuuu IPR3 658 858 1111 1111 1111 1111 uuuu uuuu PIR3 658 858 0000 0000 0000 0000 uuuu uuuu PIE3 658 858 0000 0000 0000 0000 uuuu uuuu IPR2 658 858 -1-- 1111 -1-- 1111 -u-- uuuu PIR2 658 858 -0-- 0000 -0-- 0000 -u-- uuuu (1) PIE2 658 858 -0-- 0000 -0-- 0000 -u-- uuuu IPR1 658 858 1111 1111 1111 1111 uuuu uuuu 658 858 -111 1111 -111 1111 -uuu uuuu PIR1 658 858 0000 0000 0000 0000 uuuu uuuu (1) 658 858 -000 0000 -000 0000 -uuu uuuu (1) PIE1 658 858 0000 0000 0000 0000 uuuu uuuu 658 858 -000 0000 -000 0000 -uuu uuuu TABLE 3-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED) Register Applicable Devices Power-on Reset, Brown-out Reset MCLR Reset WDT Reset RESET Instruction Stack Resets Wake-up via WDT or Interrupt Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ’0’, q = value depends on condition Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector (0008h or 0018h). 3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack. 4: See Table 3-2 for RESET value for specific condition. 5: Bit 6 of PORTA, LATA, and TRISA are enabled in ECIO and RCIO oscillator modes only. In all other oscillator modes, they are disabled and read ’0’. 6: The long write enable is only reset on a POR or MCLR. 7: Available on PIC18C858 only. |
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