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PIC18LC658-E/CL Datasheet(PDF) 73 Page - Microchip Technology |
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PIC18LC658-E/CL Datasheet(HTML) 73 Page - Microchip Technology |
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73 / 366 page  2000 Microchip Technology Inc. Advanced Information DS30475A-page 73 PIC18CXX8 Example 6-4 shows the sequence to perform an 16 x 16 signed multiply. Equation 6-2 shows the algorithm used. The 32-bit result is stored in four registers RES3:RES0. To account for the sign bits of the argu- ments, each argument pairs most significant bit (MSb) is tested and the appropriate subtractions are done. EQUATION 6-2: 16 x 16 SIGNED MULTIPLICATION ALGORITHM EXAMPLE 6-4: 16 x 16 SIGNED MULTIPLY ROUTINE RES3:RES0 = ARG1H:ARG1L • ARG2H:ARG2L = (ARG1H • ARG2H • 216)+ (ARG1H • ARG2L • 28)+ (ARG1L • ARG2H • 28)+ (ARG1L • ARG2L) + (-1 • ARG2H<7> • ARG1H:ARG1L • 216)+ (-1 • ARG1H<7> • ARG2H:ARG2L • 216) MOVFF ARG1L, WREG MULWF ARG2L ; ARG1L * ARG2L -> ; PRODH:PRODL MOVFF PRODH, RES1 ; MOVFF PRODL, RES0 ; ; MOVFF ARG1H, WREG MULWF ARG2H ; ARG1H * ARG2H -> ; PRODH:PRODL MOVFF PRODH, RES3 ; MOVFF PRODL, RES2 ; ; MOVFF ARG1L, WREG MULWF ARG2H ; ARG1L * ARG2H -> ; PRODH:PRODL MOVF PRODL, W ; ADDWF RES1, F ; Add cross MOVF PRODH, W ; products ADDWFC RES2, F ; CLRF WREG ; ADDWFC RES3, F ; ; MOVFF ARG1H, WREG ; MULWF ARG2L ; ARG1H * ARG2L -> ; PRODH:PRODL MOVF PRODL, W ; ADDWF RES1, F ; Add cross MOVF PRODH, W ; products ADDWFC RES2, F ; CLRF WREG ; ADDWFC RES3, F ; ; BTFSS ARG2H, 7 ; ARG2H:ARG2L neg? GOTO SIGN_ARG1 ; no, check ARG1 MOVFF ARG1L, WREG ; SUBWF RES2 ; MOVFF ARG1H, WREG ; SUBWFB RES3 ; SIGN_ARG1 BTFSS ARG1H, 7 ; ARG1H:ARG1L neg? GOTO CONT_CODE ; no, done MOVFF ARG2L, WREG ; SUBWF RES2 ; MOVFF ARG2H, WREG ; SUBWFB RES3 ; CONT_CODE : |
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