PIC18LC658-ESLASHCL datasheet(95/366 Pages) MICROCHIP

95 / 366 page

 2000 Microchip Technology Inc.

Advanced Information

DS30475A-page 95

PIC18CXX8

8.4

PORTD, TRISD and LATD Registers

PORTD is an 8-bit wide, bi-directional port. The corre-

sponding Data Direction register is TRISD. Setting a

TRISD bit (=1) will make the corresponding PORTD pin

an input (i.e., put the corresponding output driver in a

hi-impedance mode). Clearing a TRISD bit (=0) will

make the corresponding PORTD pin an output (i.e., put

the contents of the output latch on the selected pin).

Read-modify-write operations on the LATD register

reads and writes the latched output value for PORTD.

PORTD is an 8-bit port with Schmitt Trigger input buff-

ers. Each pin is individually configurable as an input or

output.

PORTD can be configured as an 8-bit wide micro-

processor port (parallel slave port), by setting control

bit PSPMODE (PSPCON register). In this mode, the

input buffers are TTL. See Section 9.0 for additional

information on the Parallel Slave Port (PSP).

EXAMPLE 8-4:

INITIALIZING PORTD

FIGURE 8-7:

PORTD BLOCK DIAGRAM

IN I/O PORT MODE

CLRF

PORTD

; Initialize PORTD by

; clearing output

; data latches

CLRF

LATD

; Alternate method

; to clear output

; data latches

MOVLW

0xCF

; Value used to

; initialize data

; direction

MOVWF

TRISD

; Set RD3:RD0 as inputs

; RD5:RD4 as outputs

; RD7:RD6 as inputs

Data

Bus

WR LATD

WR TRISD

RD PORTD

Data Latch

TRIS Latch

RD TRISD

Schmitt

Trigger

Input

Buffer

I/O Pin

Note: I/O pins have diode protection to VDD and VSS.

RD LATD

WR PORTD

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