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PIC18LC658-E/CL Datasheet(PDF) 85 Page - Microchip Technology

Part # PIC18LC658-E/CL
Description  High-Performance Microcontrollers with CAN Module
PDF  366 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18LC658-E/CL Datasheet(HTML) 85 Page - Microchip Technology

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 2000 Microchip Technology Inc.
Advanced Information
DS30475A-page 85
PIC18CXX8
REGISTER 7-6:
PIE REGISTERS (CONT’D)
PIE2
bit 7
Unimplemented: Read as ’0’
bit 6
CMIE: Comparator Interrupt Enable bit
1
= Enables the comparator interrupt
0
= Disables the comparator interrupt
bit 5-4
Unimplemented: Read as ’0’
bit 3
BCLIE: Bus Collision Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 2
LVDIE: Low-voltage Detect Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 1
TMR3IE: TMR3 Overflow Interrupt Enable bit
1
= Enables the TMR3 overflow interrupt
0
= Disables the TMR3 overflow interrupt
bit 0
CCP2IE: CCP2 Interrupt Enable bit
1
= Enables the CCP2 interrupt
0
= Disables the CCP2 interrupt
PIE3
bit 7
IVRE: Invalid CAN Message Received Interrupt Enable bit
1
= Enables the Invalid CAN Message Received Interrupt
0
= Disables the Invalid CAN Message Received Interrupt
bit 6
WAKIE: Bus Activity Wake-up Interrupt Enable bit
1
= Enables the Bus Activity Wake-Up Interrupt
0
= Disables the Bus Activity Wake-Up Interrupt
bit 5
ERRIE: CAN Bus Error Interrupt Enable bit
1
= Enables the CAN Bus Error Interrupt
0
= Disables the CAN Bus Error Interrupt
bit 4
TXB2IE: Transmit Buffer 2 Interrupt Enable bit
1
= Enables the Transmit Buffer 2 Interrupt
0
= Disables the Transmit Buffer 2 Interrupt
bit 3
TXB1IE: Transmit Buffer 1 Interrupt Enable bit
1
= Enables the Transmit Buffer 1 Interrupt
0
= Disables the Transmit Buffer 1 Interrupt
bit 2
TXB0IE: Transmit Buffer 0 Interrupt Enable bit
1
= Enables the Transmit Buffer 0 Interrupt
0
= Disables the Transmit Buffer 0 Interrupt
bit 1
RXB1IE: Receive Buffer 1 Interrupt Enable bit
1
= Enables the Receive Buffer 1 Interrupt
0
= Disables the Receive Buffer 1 Interrupt
bit 0
RXB0IE: Receive Buffer 0 Interrupt Enable bit
1
= Enables the Receive Buffer 0 Interrupt
0
= Disables the Receive Buffer 0 Interrupt
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown



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