TPS54341_15 datasheet(31/48 Pages) TI

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ENA

UVLO2

START

ENA

UVLO1

1.2 V

87.8 k

- V

5.75 V - 1.2 V

1.2

365 k

START

STOP

UVLO1

HYS

- V

5.75 V - 4.5 V

368 k

3.4

REF

(ms)

(µA)

1.7 µA

(nF) =

3.5 ms

9.3 nF

(V)

0.8

(0.8 V

0.8 )

OUT

SSavg

0.8

TPS54341

www.ti.com

SLVSC61 – NOVEMBER 2013

Slow-Start Capacitor

The slow-start capacitor determines the minimum amount of time it will take for the output voltage to reach its

nominal programmed value during power up. This is useful if a load requires a controlled voltage slew rate. This

is also used if the output capacitance is large and would require large amounts of current to quickly charge the

capacitor to the output voltage level. The large currents necessary to charge the capacitor may make the

TPS54341 device reach the current limit or excessive current draw from the input power supply may cause the

input voltage rail to sag. Limiting the output voltage slew rate solves both of these problems.

The slow-start time must be long enough to allow the regulator to charge the output capacitor up to the output

voltage without drawing excessive current. Equation 43 can be used to find the minimum slow-start time, TSS,

necessary to charge the output capacitor, COUT, from 10% to 90% of the output voltage, VOUT, with an average

slow-start current of ISSavg. In the example, to charge the effective output capacitance of 70 µF up to 3.3 V with

an average current of 1 A requires a 0.2-ms slow-start time.

Once the slow-start time is known, the slow-start capacitor value can be calculated using Equation 5. For the

example circuit, the slow-start time is not too critical because the output capacitor value is 100

μF which does not

require much current to charge to 3.3 V. The example circuit has the slow-start time set to an arbitrary value of

3.5 ms which requires a 9.3-nF slow-start capacitor calculated by Equation 44. For this design, the next larger

standard value of 10 nF is used.

(43)

(44)

Bootstrap Capacitor Selection

A 0.1-

μF ceramic capacitor must be connected between the BOOT and SW pins for proper operation. A ceramic

capacitor with X5R or better grade dielectric is recommended. The capacitor must have a 10 V or higher voltage

rating.

Undervoltage Lockout Set Point

The Undervoltage Lockout (UVLO) can be adjusted using an external voltage divider on the EN pin of the

TPS54341 device. The UVLO has two thresholds, one for power up when the input voltage is rising and one for

power down or brown outs when the input voltage is falling. For the example design, the supply should turn on

and start switching once the input voltage increases above 5.75 V (UVLO start). After the regulator starts

switching, it should continue to do so until the input voltage falls below 4.5 V (UVLO stop).

Programmable UVLO threshold voltages are set using the resistor divider of RUVLO1 and RUVLO2 between VIN and

ground connected to the EN pin. Equation 3 and Equation 4 calculate the resistance values necessary. For the

example application, a 365 k

Ω between Vin and EN (RUVLO1) and a 88.7 kΩ between EN and ground (RUVLO2)

are required to produce the 8-V and 6.25-V start and stop voltages.

(45)

(46)

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